Issued Patents All Time
Showing 26–27 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8631376 | Method and system for generating a placement layout of a VLSI circuit design | Tobias Werner, Anthony Parent, Alexander Woerner | 2014-01-14 |
| 8587990 | Global bit line restore by most significant bit of an address line | Yuen H. Chan, Michael Kugel, Tobias Werner | 2013-11-19 |