Issued Patents All Time
Showing 25 most recent of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8607003 | Memory access to a dual in-line memory module form factor flash memory | Dhruv M. Desai, Jimmy G. Foster, Sr., Makoto Ono | 2013-12-10 |
| 8102651 | Airflow barriers for efficient cooling of memory modules | Vinod Kamath, Jimmy G. Foster, Sr., Ivan R. Zapata | 2012-01-24 |
| 7984326 | Memory downsizing in a computer memory subsystem | Jimmy G. Foster, Sr. | 2011-07-19 |
| 7930573 | Workload apportionment according to mean and variance | Yiyu L. Chen, Angela Beth Dalton, Amitayu Das, Richard E. Harper, William Joseph Piazza | 2011-04-19 |
| 7694055 | Directing interrupts to currently idle processors | Ryuji Orita, Susumu Arai, Brian Allison | 2010-04-06 |
| 7562247 | Providing independent clock failover for scalable blade servers | Marcus A. Baker, Justin P. Bandholz, Andrew S. Heinzmann | 2009-07-14 |
| 7464195 | Method and apparatus for detecting a presence of a device | Randoph S. Kolvick | 2008-12-09 |
| 7287138 | Low cost and high RAS mirrored memory | Thomas Basil Smith, III, Robert B. Tremaine, Michael Wazlowski | 2007-10-23 |
| 7069477 | Methods and arrangements to enhance a bus | Jefferey B. Williams, Brandon Wyatt, Kit H. Wong | 2006-06-27 |
| 6766429 | Low cost and high RAS mirrored memory | Thomas Basil Smith, III, Robert B. Tremaine, Michael Wazlowski | 2004-07-20 |
| 6601109 | USB-based networking and I/O hub | Richard Bealkowski | 2003-07-29 |
| 6601147 | Computer system and method for maintaining an integrated shared buffer memory in a group of interconnected hosts | Richard Bealkowski | 2003-07-29 |
| 6330656 | PCI slot control apparatus with dynamic configuration for partitioned systems | Richard Bealkowski | 2001-12-11 |
| 6282596 | Method and system for hot-plugging a processor into a data processing system | Richard Bealkowski | 2001-08-28 |
| 5678064 | Local bus-ISA bridge for supporting PIO and third party DMA data transfers to IDE drives | Amy Kulik, Dennis Moeller, William Alan Wall, Sagi Katz, Suksoon Yong | 1997-10-14 |
| 5642489 | Bridge between two buses of a computer system with a direct memory access controller with accessible registers to support power management | Richard Gerard Hofmann, Dennis Moeller, Lance M. Venarchick | 1997-06-24 |
| 5623697 | Bridge between two buses of a computer system with a direct memory access controller having a high address extension and a high count extension | Daniel R. Cronin, III, Richard Gerard Hofmann, Dennis Moeller, Lance M. Venarchick | 1997-04-22 |
| 5619729 | Power management of DMA slaves with DMA traps | Richard Gerard Hofmann, Robert T. Jackson, Nader Amini, Bechara F. Boury, Jayesh M. Joshi | 1997-04-08 |
| 5561820 | Bridge for interfacing buses in computer system with a direct memory access controller having dynamically configurable direct memory access channels | Daniel R. Cronin, III, Richard Gerard Hofmann, Dennis Moeller, Lance M. Venarchick | 1996-10-01 |
| 5557758 | Bridge between two buses of a computer system that determines the location of memory or accesses from bus masters on one of the buses | Richard Gerard Hofmann, Sagi Katz, Dennis Moeller, Lance M. Venarchick | 1996-09-17 |
| 5546568 | CPU clock control unit | Robert T. Jackson, Jayesh M. Joshi, James P. Kardach | 1996-08-13 |
| 5542053 | Bridge interface between two buses of a computer system with a direct memory access controller programmed by a scatter/gather programmer | Daniel R. Cronin, III, Richard Gerard Hofmann, Dennis Moeller, Lance M. Venarchick | 1996-07-30 |
| 5522064 | Data processing apparatus for dynamically setting timings in a dynamic memory system | Alfredo Aldereguia, Daryl Cromer, Rodger M. Stutes | 1996-05-28 |
| 5517650 | Bridge for a power managed computer system with multiple buses and system arbitration | Richard Gerard Hofmann, Dennis Moeller, Suksoon Yong, Moises Cases, Lance M. Venarchick +1 more | 1996-05-14 |
| 5499346 | Bus-to-bus bridge for a multiple bus information handling system that optimizes data transfers between a system bus and a peripheral bus | Nader Amini, Bechara F. Boury, Robert T. Jackson | 1996-03-12 |