| 12147329 |
Uniform process for generating multiple outputs with common section in pseudo-random software system |
Michal Rimon, Avishai Moshe Fedida, Ofek Gutman |
2024-11-19 |
| 11487276 |
Salvaging outputs of tools |
— |
2022-11-01 |
| 11361136 |
Creating multiple use test case |
— |
2022-06-14 |
| 11188304 |
Validating microprocessor performance |
Gal Ashour, Michal Rimon, Karen Holtz, Silvia M. Mueller, Avishai Moshe Fedida |
2021-11-30 |
| 11169909 |
Flexible test program generation by altering previously used resources |
Ofer Peled |
2021-11-09 |
| 10324815 |
Error checking of a multi-threaded computer processor design under test |
Erez Barak, Gilad Merran, Eyal Naor |
2019-06-18 |
| 10061672 |
Implementing random content of program loops in random test generation for processor verification |
Adi Dagan, Avishai Moshe Fedida, Olaf K. Hendrickson |
2018-08-28 |
| 9251023 |
Implementing automated memory address recording in constrained random test generation for verification of processor hardware designs |
Craig Atherton, Avishai Moshe Fedida, Olaf K. Hendrickson |
2016-02-02 |
| 9117023 |
Dynamic generation of test segments |
Yoav Katz |
2015-08-25 |
| 8707101 |
Verification of operating self modifying code |
Eli Almog, Christopher A. Krygowski |
2014-04-22 |
