Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11508464 | Technology platform for care planning and coordination | Joshua A. Fishkind | 2022-11-22 |
| 8886881 | Implementing storage adapter performance optimization with parity update footprint mirroring | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2014-11-11 |
| 8868828 | Implementing storage adapter performance optimization with cache data/directory mirroring | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2014-10-21 |
| 8793462 | Implementing storage adapter performance optimization with enhanced resource pool allocation | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2014-07-29 |
| 8656213 | Implementing storage adapter performance optimization with chained hardware operations and error recovery firmware path | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2014-02-18 |
| 8544029 | Implementing storage adapter performance optimization with chained hardware operations minimizing hardware/firmware interactions | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2013-09-24 |
| 8516164 | Implementing storage adapter performance optimization with enhanced hardware and software interface | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2013-08-20 |
| 8495259 | Implementing storage adapter performance optimization with hardware chains to select performance path | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2013-07-23 |
| 8495258 | Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA | Brian E. Bakke, Brian L. Bowles, Robert Edward Galbraith, Adrian C. Gerhard, Murali N. Iyer +5 more | 2013-07-23 |
| 7979759 | Test and bring-up of an enhanced cascade interconnect memory system | Elianne A. Bravo, Kevin C. Gower, Gary A. Van Huben, Donald J. Ziebarth | 2011-07-12 |
| 7975064 | Envelope packet architecture for broadband engine | Scott Douglas Clark, David Wayne Hill, Charles Ray Johns, Thomas K. Pokrandt, Jeffrey Joseph Ruedinger +1 more | 2011-07-05 |
| 7783957 | Apparatus for implementing enhanced vertical ECC storage in a dynamic random access memory | Steven B. Herndon, Daniel F. Moertl | 2010-08-24 |
| 7558132 | Implementing calibration of DQS sampling during synchronous DRAM reads | Daniel F. Moertl | 2009-07-07 |
| 7512143 | Buffer management for a target channel adapter | Daniel F. Moertl, Timothy J. Schimke | 2009-03-31 |
| 7480197 | Implementing calibration of DQS sampling during synchronous DRAM reads | Daniel F. Moertl | 2009-01-20 |
| 7451380 | Method for implementing enhanced vertical ECC storage in a dynamic random access memory | Steven B. Herndon, Daniel F. Moertl | 2008-11-11 |
| 7266083 | Method and apparatus for implementing queue pair connection protection over infiniband | Charles S. Graham, Brent William Jacobs, Daniel F. Moertl, Timothy J. Schimke, Lee A. Sendelbach | 2007-09-04 |
| 7225364 | Method and apparatus for implementing infiniband receive function | Charles S. Graham, Daniel F. Moertl, Timothy J. Schimke | 2007-05-29 |
| 7212547 | Method and apparatus for implementing global to local queue pair translation | Charles S. Graham, Daniel F. Moertl, Timothy J. Schimke | 2007-05-01 |
| 7133943 | Method and apparatus for implementing receive queue for packet-based communications | Daniel F. Moertl | 2006-11-07 |
| 7024613 | Method and apparatus for implementing infiniband transmit queue | Charles S. Graham, Daniel F. Moertl, Timothy J. Schimke | 2006-04-04 |
| 6430648 | Arranging address space to access multiple memory banks | — | 2002-08-06 |
| 6353910 | Method and apparatus for implementing error correction coding (ECC) in a dynamic random access memory utilizing vertical ECC storage | Daniel F. Moertl | 2002-03-05 |
| 5721874 | Configurable cache with variable, dynamically addressable line sizes | Gary S. Delp | 1998-02-24 |
| 5687337 | Mixed-endian computer system | Martin E. Hopkins, Larry Wayne Loen, Edward John Silha, Andrew Henry Wottreng | 1997-11-11 |