MC

Mark F. Chadurjian

IBM: 2 patents #32,839 of 70,183Top 50%
📍 South Burlington, VT: #595 of 1,136 inventorsTop 55%
🗺 Vermont: #2,192 of 4,968 inventorsTop 45%
Overall (All Time): #2,304,769 of 4,157,543Top 60%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5251806 Method of forming dual height solder interconnections Birendra Agarwala, Aziz Mohammad Ahsan, Arthur Bross, Nicholas G. Koopman, Li-Chung Lee +8 more 1993-10-12
5130779 Solder mass having conductive encapsulating arrangement Birendra Agarwala, Aziz Mohammad Ahsan, Arthur Bross, Nicholas G. Koopman, Li-Chung Lee +8 more 1992-07-14