Issued Patents All Time
Showing 126–130 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6338116 | Method and apparatus for a data-less write operation within a cache memory hierarchy for a data processing system | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-01-08 |
| 6321306 | High performance multiprocessor system with modified-unsolicited cache state | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2001-11-20 |
| 6314498 | Multiprocessor system bus transaction for transferring exclusive-deallocate cache state to lower lever cache | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2001-11-06 |
| 6298416 | Method and apparatus for transmitting control signals within a hierarchial cache memory architecture for a data processing system | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai, Praveen S. Reddy | 2001-10-02 |
| 6282615 | Multiprocessor system bus with a data-less castout mechanism | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2001-08-28 |