Issued Patents All Time
Showing 101–125 of 130 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6460118 | Set-associative cache memory having incremental access latencies among sets | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr., Guy L. Guthrie | 2002-10-01 |
| 6460117 | Set-associative cache memory having a mechanism for migrating a most recently used set | Ravi Kumar Arimilli, John Steven Dodson, James Stephen Fields, Jr., Guy L. Guthrie | 2002-10-01 |
| 6442653 | Data processing system, cache, and method that utilize a coherency state to indicate the latency of cached data | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-08-27 |
| 6434669 | Method of cache management to dynamically update information-type dependent cache policies | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-08-13 |
| 6434668 | Method of cache management to store information in particular regions of the cache according to information-type | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-08-13 |
| 6425058 | Cache management mechanism to enable information-type dependent cache policies | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-07-23 |
| 6421763 | Method for instruction extensions for a tightly coupled speculative request unit | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. | 2002-07-16 |
| 6421762 | Cache allocation policy based on speculative request history | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. | 2002-07-16 |
| 6408362 | Data processing system, cache, and method that select a castout victim in response to the latencies of memory copies of cached data | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-06-18 |
| 6405290 | Multiprocessor system bus protocol for O state memory-consistent data | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-06-11 |
| 6397303 | Data processing system, cache, and method of cache management including an O state for memory-consistent cache lines | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-05-28 |
| 6393528 | Optimized cache allocation algorithm for multiple speculative requests | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. | 2002-05-21 |
| 6385695 | Method and system for maintaining allocation information on data castout from an upper level cache | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-05-07 |
| 6385702 | High performance multiprocessor system with exclusive-deallocate cache state | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-05-07 |
| 6374333 | Cache coherency protocol in which a load instruction hint bit is employed to indicate deallocation of a modified cache line supplied by intervention | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-04-16 |
| 6370618 | Method and system for allocating lower level cache entries for data castout from an upper level cache | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-04-09 |
| 6360299 | Extended cache state with prefetched stream ID information | Ravi Kumar Arimilli, Leo James Clark, John Steven Dodson, Guy L. Guthrie, James Stephen Fields, Jr. | 2002-03-19 |
| 6356980 | Method and system for bypassing cache levels when casting out from an upper level cache | Ravi Kumar Arimilli, James Stephen Fields, Jr. | 2002-03-12 |
| 6356982 | Dynamic mechanism to upgrade o state memory-consistent cache lines | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-03-12 |
| 6349368 | High performance mechanism to support O state horizontal cache-to-cache transfers | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-02-19 |
| 6349369 | Protocol for transferring modified-unsolicited state during data intervention | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-19 |
| 6345344 | Cache allocation mechanism for modified-unsolicited cache state that modifies victimization priority bits | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6345343 | Multiprocessor system bus protocol with command and snoop responses for modified-unsolicited cache state | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6345342 | Cache coherency protocol employing a read operation including a programmable flag to indicate deallocation of an intervened cache line | Ravi Kumar Arimilli, John Steven Dodson, Guy L. Guthrie, William J. Starke | 2002-02-05 |
| 6345341 | Method of cache management for dynamically disabling O state memory-consistent data | Ravi Kumar Arimilli, James Stephen Fields, Jr., Sanjeev Ghai | 2002-02-05 |