HL

Hung-Yi Liu

IBM: 7 patents #14,640 of 70,183Top 25%
TSMC: 5 patents #4,208 of 12,232Top 35%
Overall (All Time): #414,532 of 4,157,543Top 10%
12
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10789400 Scheduling simultaneous optimization of multiple very-large-scale-integration designs Matthew M. Ziegler 2020-09-29
10083268 Scheduling simultaneous optimization of multiple very-large-scale-integration designs Matthew M. Ziegler 2018-09-25
10002221 Enhanced parameter tuning for very-large-scale integration synthesis Matthew M. Ziegler 2018-06-19
9934344 Enhanced parameter tuning for very-large-scale integration synthesis Matthew M. Ziegler 2018-04-03
9619602 Enhanced parameter tuning for very-large-scale integration synthesis Matthew M. Ziegler 2017-04-11
9600623 Scheduling simultaneous optimization of multiple very-large-scale-integration designs Matthew M. Ziegler 2017-03-21
9582627 Enhanced parameter tuning for very-large-scale integration synthesis Matthew M. Ziegler 2017-02-28
9111065 Method for dummy metal and dummy via insertion Chung-Hsing Wang, Chih-Chieh Chen, Jian-Yi Li 2015-08-18
8661395 Method for dummy metal and dummy via insertion Chung-Hsing Wang, Chih-Chieh Chen, Jian-Yi Li 2014-02-25
8504965 Method for non-shrinkable IP integration Chung-Hsing Wang, Yung-Chin Hou, Lie-Szu Juang 2013-08-06
8307321 Method for dummy metal and dummy via insertion Chung-Hsing Wang, Chih-Chieh Chen, Jian-Yi Li 2012-11-06
8239802 Robust method for integration of bump cells in semiconductor device design Chung-Hsing Wang, Agrawal Aditya Binodkumar 2012-08-07