Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9383767 | Circuit design for balanced logic stress | Nathaniel R. Chadwick, William Paul Hovis, Kirk D. Peterson, Mack W. Riley | 2016-07-05 |
| 9250645 | Circuit design for balanced logic stress | Nathaniel R. Chadwick, William Paul Hovis, Kirk D. Peterson, Mack W. Riley | 2016-02-02 |
| 8943458 | Determining chip burn-in workload using emulated application condition | Nathaniel R. Chadwick, William Paul Hovis, Kirk D. Peterson, Mack W. Riley | 2015-01-27 |
| 7715937 | Allocating manufactured devices according to customer specifications | Benjamin R. Bayat | 2010-05-11 |
| 7139630 | Allocating manufactured devices according to customer specifications | Benjamin R. Bayat | 2006-11-21 |