Issued Patents All Time
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7194585 | Coherency controller management of transactions | Wayne A. Downer, Thomas D. Lovett | 2007-03-20 |
| 7089372 | Local region table for storage of information regarding memory access by other nodes | William Durr, Robert Joersz, Davis A. Miller | 2006-08-08 |
| 6996665 | Hazard queue for transaction pipeline | Bruce M. Gilbert, Robert Joersz, Eric N. Lais, Maged M. Michael | 2006-02-07 |
| 6971041 | Cache entry error-correcting code (ECC) based at least on cache entry data and memory address | Thomas D. Lovett | 2005-11-29 |
| 6848026 | Caching memory contents into cache partitions based on memory locations | Adrian C. Moga, Carl E. Love, Russell M. Clapp | 2005-01-25 |
| 6829679 | Different caching treatment of memory contents based on memory region | Thomas D. Lovett | 2004-12-07 |
| 6295584 | Multiprocessor computer system with memory map translation | Bruce M. Gilbert, Thomas D. Lovett, Robert J. Safranek, Kenneth Frank Dove | 2001-09-25 |