DW

Derek E. Williams

IBM: 353 patents #50 of 70,183Top 1%
Globalfoundries: 3 patents #1,029 of 4,424Top 25%
AL Afilias Limited: 1 patents #16 of 24Top 70%
IM International Machines: 1 patents #1 of 34Top 3%
📍 Round Rock, TX: #1 of 1,915 inventorsTop 1%
🗺 Texas: #16 of 125,132 inventorsTop 1%
Overall (All Time): #816 of 4,157,543Top 1%
362
Patents All Time

Issued Patents All Time

Showing 326–350 of 362 patents

Patent #TitleCo-InventorsDate
6292908 Method and apparatus for monitoring internal bus signals by using a reduced image of the internal bus Ravi Kumar Arimilli, Keenan W. Franz, David B. Shuler 2001-09-18
6223142 Method and system for incrementally compiling instrumentation into a simulation model John Fowler Bargh, Wolfgang Roesner, Bryan Hunt 2001-04-24
6212605 Eviction override for larx-reserved addresses Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2001-04-03
6212491 Automatic adjustment for counting instrumentation John Fowler Bargh, Bryan Hunt, Wolfgang Roesner 2001-04-03
6202131 Method and apparatus for executing variable delay system bus operations of differing type or character without dead lock using shared buffers Ravi Kumar Arimilli, John Michael Kaiser 2001-03-13
6202042 Hardware simulator instrumentation John Fowler Bargh, Bryan Hunt, Wolfgang Roesner 2001-03-13
6195629 Method and system for selectively disabling simulation model instrumentation John Fowler Bargh, Bryan Hunt, Wolfgang Roesner 2001-02-27
6195627 Method and system for instrumenting simulation models John Fowler Bargh, Bryan Hunt, Wolfgang Roesner 2001-02-27
6192453 Method and apparatus for executing unresolvable system bus operations Ravi Kumar Arimilli, John Michael Kaiser () 2001-02-20
6182201 Demand-based issuance of cache operations to a system bus Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2001-01-30
6178485 Method and apparatus for executing singly-initiated, singly-sourced variable delay system bus operations of differing character Ravi Kumar Arimilli, John Michael Kaiser 2001-01-23
6175930 Demand based sync bus operation Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2001-01-16
6173371 Demand-based issuance of cache operations to a processor bus Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2001-01-09
6161189 Latch-and-hold circuit that permits subcircuits of an integrated circuit to operate at different frequencies Ravi Kumar Arimilli, Jerry Don Lewis 2000-12-12
6141714 Method and apparatus for executing self-snooped unresolvable system bus operations Ravi Kumar Arimilli, John Michael Kaiser 2000-10-31
6128705 Method and apparatus for executing multiply-initiated, multiply-sourced variable delay system bus operations Ravi Kumar Arimilli, John Michael Kaiser 2000-10-03
6122691 Apparatus and method of layering cache and architectural specific functions to permit generic interface definition Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-09-19
6105112 Dynamic folding of cache operations for multiple coherency-size systems Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-08-15
6092132 Method and apparatus for monitoring 60x bus signals at a reduced frequency Ravi Kumar Arimilli, Keenan W. Franz, David B. Shuler 2000-07-18
6065086 Demand based sync bus operation Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-05-16
6061755 Method of layering cache and architectural specific functions to promote operation symmetry Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-05-09
6061762 Apparatus and method for separately layering cache and architectural specific functions in different operational controllers Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-05-09
6032226 Method and apparatus for layering cache and architectural specific functions to expedite multiple design Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-02-29
6029204 Precise synchronization mechanism for SMP system buses using tagged snoop operations to avoid retries Ravi Kumar Arimilli, John Steven Dodson, Jerry Don Lewis 2000-02-22
6016526 Method and apparatus for transferring data between buses having differing ordering policies via the use of autonomous units Ravi Kumar Arimilli 2000-01-18