Issued Patents All Time
Showing 26–47 of 47 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8867550 | Sliced routing table management with replication | Claude Bawsso, Colin Beaton Verrilli, Bruce M. Walk, Daniel Wind | 2014-10-21 |
| 8854973 | Sliced routing table management with replication | Claude Basso, Colin Beaton Verrilli, Bruce M. Walk, Daniel Wind | 2014-10-07 |
| 8817796 | Cached routing table management | Claude Basso, Colin Beaton Verrilli, Bruce M. Walk, Daniel Wind | 2014-08-26 |
| 8792494 | Facilitating insertion of device MAC addresses into a forwarding database | Debra L. Angst, Claude Basso, Josep Cors, Colin Beaton Verrilli | 2014-07-29 |
| 8787373 | Multicast miss notification for a distributed network switch | Josep Cors, Todd A. Greenfield, Bruce M. Walk | 2014-07-22 |
| 8594090 | Multicasting using a multitiered distributed virtual bridge hierarchy | William J. Armstrong, Claude Basso, Josep Cors, Kyle A. Lucke, Kenneth M. Valk +1 more | 2013-11-26 |
| 8594100 | Data frame forwarding using a distributed virtual bridge | William J. Armstrong, Claude Basso, David R. Engebretsen, Kyle A. Lucke, Jeffrey J. Lynch +2 more | 2013-11-26 |
| 8566257 | Address data learning and registration within a distributed virtual bridge | William J. Armstrong, Claude Basso, Josep Cors, David R. Engebretsen, Kyle A. Lucke +2 more | 2013-10-22 |
| 8566607 | Cryptography methods and apparatus used with a processor | William T. Flynn | 2013-10-22 |
| 8514885 | Using variable length packets to embed extra network control information | William T. Flynn, Kenneth M. Valk | 2013-08-20 |
| 8416785 | Implementing ghost packet removal within a reliable meshed network | Phillip Rogers Hillier, III, Kenneth M. Valk, Bruce M. Walk | 2013-04-09 |
| 8379642 | Multicasting using a multitiered distributed virtual bridge hierarchy | William J. Armstrong, Claude Basso, Josep Cors, Kyle A. Lucke, Kenneth M. Valk +1 more | 2013-02-19 |
| 8358658 | Implementing ordered and reliable transfer of packets while spraying packets over multiple links | William T. Flynn, Phillip Rogers Hillier, III, Kenneth M. Valk | 2013-01-22 |
| 8340112 | Implementing enhanced link bandwidth in a headless interconnect chip | Phillip Rogers Hillier, III, Kenneth M. Valk | 2012-12-25 |
| 8028128 | Method for increasing cache directory associativity classes in a system with a register space memory | Duane A. Averill, Herman L. Blackmon, Joseph A. Kirscht | 2011-09-27 |
| 8010682 | Early coherency indication for return data in shared memory architecture | Wayne M. Barrett, Kenneth M. Valk, Brian T. Vanderpool | 2011-08-30 |
| 7941633 | Hash optimization system and method | Marcy E. Byers, Ronald E. Freking, Ryan Scott Haraden | 2011-05-10 |
| 7925857 | Method for increasing cache directory associativity classes via efficient tag bit reclaimation | Duane A. Averill, Herman L. Blackmon, Joseph A. Kirscht | 2011-04-12 |
| 7788452 | Method and apparatus for tracking cached addresses for maintaining cache coherency in a computer system having multiple caches | Duane A. Averill, Russell D. Hoover, Martha E. Voytovich | 2010-08-31 |
| 7650259 | Method for tuning chipset parameters to achieve optimal performance under varying workload types | Herman L. Blackmon, Joseph A. Kirscht, Brian T. Vanderpool | 2010-01-19 |
| 6963516 | Dynamic optimization of latency and bandwidth on DRAM interfaces | Herman L. Blackmon, John Michael Borkenhagen, Joseph A. Kirscht, James Anthony Marcella | 2005-11-08 |
| 6260090 | Circuit arrangement and method incorporating data buffer with priority-based data storage | Ronald Edward Fuhs, Kenneth Claude Hinz, Russell D. Hoover | 2001-07-10 |