Issued Patents All Time
Showing 51–75 of 115 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9310827 | Multiple active vertically aligned cores for three-dimensional chip stack | Gerald K. Bartley, William Paul Hovis | 2016-04-12 |
| 9281261 | Intelligent chip placement within a three-dimensional chip stack | Gerald K. Bartley, Philip Raymond Germann, William Paul Hovis | 2016-03-08 |
| 9003559 | Continuity check monitoring for microchip exploitation detection | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2015-04-07 |
| 8823090 | Field-effect transistor and method of creating same | Gerald K. Bartley, Philip Raymond Germann, Andrew Benson Maki, John E. Sheets, II | 2014-09-02 |
| 8796578 | Implementing selective rework for chip stacks and silicon carrier assemblies | Gerald K. Bartley, Philip Raymond Germann, Andrew Benson Maki | 2014-08-05 |
| 8519304 | Implementing selective rework for chip stacks and silicon carrier assemblies | Gerald K. Bartley, Philip Raymond Germann, Andrew Benson Maki | 2013-08-27 |
| 8466024 | Power domain controller with gated through silicon via having FET with horizontal channel | Gerald K. Bartley, Philip Raymond Germann, Andrew Benson Maki, John E. Sheets, II | 2013-06-18 |
| 8332659 | Signal quality monitoring to defeat microchip exploitation | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2012-12-11 |
| 8214657 | Resistance sensing for defeating microchip exploitation | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2012-07-03 |
| 8174103 | Enhanced architectural interconnect options enabled with flipped die on a multi-chip package | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2012-05-08 |
| 8172140 | Doped implant monitoring for microchip tamper detection | Gerald K. Bartley, Todd A. Christensen, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki +2 more | 2012-05-08 |
| 8108647 | Digital data architecture employing redundant links in a daisy chain of component modules | Gerald K. Bartley, John Michael Borkenhagen, Philip Raymond Germann, William Paul Hovis, Mark O. Maxson | 2012-01-31 |
| 8079134 | Method of enhancing on-chip inductance structure utilizing silicon through via technology | Andrew Benson Maki, Gerald K. Bartley, Philip Raymond Germann, Mark O. Maxson, Paul Eric Dahlen +1 more | 2011-12-20 |
| 7952478 | Capacitance-based microchip exploitation detection | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2011-05-31 |
| 7954081 | Implementing enhanced wiring capability for electronic laminate packages | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2011-05-31 |
| 7945883 | Apparatus, and computer program for implementing vertically coupled noise control through a mesh plane in an electronic package design | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2011-05-17 |
| 7884625 | Capacitance structures for defeating microchip tampering | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2011-02-08 |
| 7882479 | Method and apparatus for implementing redundant memory access using multiple controllers on the same bank of memory | Gerald K. Bartley, John Michael Borkenhagen, Paul Eric Dahlen, Philip Raymond Germann, William Paul Hovis | 2011-02-01 |
| 7852103 | Implementing at-speed Wafer Final Test (WFT) with complete chip coverage | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2010-12-14 |
| 7844769 | Computer system having an apportionable data bus and daisy chained memory chips | Gerald K. Bartley, John Michael Borkenhagen, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki +1 more | 2010-11-30 |
| 7838336 | Method and structure for dispensing chip underfill through an opening in the chip | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson | 2010-11-23 |
| 7810065 | System and method for implementing optimized creation of openings for de-gassing in an electronic package | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2010-10-05 |
| 7791978 | Design structure of implementing power savings during addressing of DRAM architectures | Gerald K. Bartley, John Michael Borkenhagen, Philip Raymond Germann, William Paul Hovis | 2010-09-07 |
| 7725762 | Implementing redundant memory access using multiple controllers on the same bank of memory | Gerald K. Bartley, John Michael Borkenhagen, Paul Eric Dahlen, Philip Raymond Germann, William Paul Hovis | 2010-05-25 |
| 7701244 | False connection for defeating microchip exploitation | Gerald K. Bartley, Paul Eric Dahlen, Philip Raymond Germann, Andrew Benson Maki, Mark O. Maxson +1 more | 2010-04-20 |