| 7661039 |
Self-synchronizing bit error analyzer and circuit |
Gerard Boudon, Didier Malcavet, David Pereira |
2010-02-09 |
| 7471333 |
Image sensing device interface unit |
Bernard Jung |
2008-12-30 |
| 7404115 |
Self-synchronising bit error analyser and circuit |
Gerard Boudon, Didier Malcavet, David Pereira |
2008-07-22 |
| 6535862 |
Method and circuit for performing the integrity diagnostic of an artificial neural network |
Didier Louis |
2003-03-18 |
| 6523018 |
Neural chip architecture and neural networks incorporated therein |
Didier Louis, Pascal Tannhof |
2003-02-18 |
| 6502083 |
Neuron architecture having a dual structure and neural networks incorporating the same |
Didier Louis, Pascal Tannhof |
2002-12-31 |
| 6377941 |
Implementing automatic learning according to the K nearest neighbor mode in artificial neural networks |
Pascal Tannhof |
2002-04-23 |
| 5717832 |
Neural semiconductor chip and neural networks incorporated therein |
Pascal Tannhof, Guy Paillet |
1998-02-10 |
| 5710869 |
Daisy chain circuit for serial connection of neuron circuits |
Catherine Godefroy, Pascal Tannhof, Guy Paillet |
1998-01-20 |
| 5701397 |
Circuit for pre-charging a free neuron circuit |
Didier Louis, Guy Paillet |
1997-12-23 |
| 5621863 |
Neuron circuit |
Jean-Yves Boulet, Didier Louis, Catherine Godefroy, Pascal Tannhof, Guy Paillet |
1997-04-15 |
| 5463574 |
Apparatus for argument reduction in exponential computations of IEEE standard floating-point numbers |
Bernard Desrosiers, Didier Louis, Didier Pinchon |
1995-10-31 |
| 5452241 |
System for optimizing argument reduction |
Bernard Desrosiers, Louis Didier, Didier Pinchon |
1995-09-19 |
| 5337265 |
Apparatus for executing add/sub operations between IEEE standard floating-point numbers |
Bernard Desrosiers, Didier Louis |
1994-08-09 |
