ST

Sergey K. Tolpygo

HY Hypres: 9 patents #7 of 52Top 15%
SE Seeqc: 1 patents #18 of 31Top 60%
Overall (All Time): #506,006 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10833243 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits Denis Amparo, Richard Hunt, John Vivalda, Daniel Yohannes 2020-11-10
10109673 Double-masking technique for increasing fabrication yield in superconducting electronics 2018-10-23
9741920 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits Denis Amparo, Richard Hunt, John Vivalda, Daniel Yohannes 2017-08-22
9595656 Double-masking technique for increasing fabrication yield in superconducting electronics 2017-03-14
9136457 Double-masking technique for increasing fabrication yield in superconducting electronics 2015-09-15
9130116 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits Denis Amparo, Richard Hunt, John Vivalda, Daniel Yohannes 2015-09-08
8437818 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits Denis Amparo, Richard Hunt, John Vivalda, Daniel Yohannes 2013-05-07
8383426 Double-masking technique for increasing fabrication yield in superconducting electronics 2013-02-26
8301214 System and method for providing multi-conductive layer metallic interconnects for superconducting integrated circuits Denis Amparo, Richard Hunt, John Vivalda, Daniel Yohannes 2012-10-30
7615385 Double-masking technique for increasing fabrication yield in superconducting electronics 2009-11-10