Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7281249 | Computer forming logical partitions | Toshiaki Tarui, Shin Kameyama, Frederico Buchholz Maciel | 2007-10-09 |
| 7206818 | Shared memory multiprocessor system | Toshio Okochi, Naoki Hamanaka, Naohiko Irie, Hideya Akashi | 2007-04-17 |
| 7062559 | Computer resource allocating method | Yutaka Yoshimura, Toshiaki Tarui, Frederico Buchholz Maciel | 2006-06-13 |
| 6874053 | Shared memory multiprocessor performing cache coherence control and node controller therefor | Yoshiko Yasuda, Naoki Hamanaka, Hideya Akashi, Yuji Tsushima, Keitaro Uehara | 2005-03-29 |
| 6789173 | Node controller for performing cache coherence control and memory-shared multiprocessor system | Tsuyoshi Tanaka, Hideya Akashi, Yuji Tsushima, Keitaro Uehara, Naoki Hamanaka | 2004-09-07 |
| 6636926 | Shared memory multiprocessor performing cache coherence control and node controller therefor | Yoshiko Yasuda, Naoki Hamanaka, Hideya Akashi, Yuji Tsushima, Keitaro Uehara | 2003-10-21 |
| 6591325 | Method and apparatus of out-of-order transaction processing using request side queue pointer and response side queue pointer | Hideya Akashi, Yuji Tsushima, Keitaro Uehara, Naoki Hamanaka, Tetsuhiko Okada +1 more | 2003-07-08 |
| 6546471 | Shared memory multiprocessor performing cache coherency | Toshiaki Tarui, Koichi Okazawa, Yasuyuki Okada, Toshio Okochi, Hideya Akashi | 2003-04-08 |
| 6516391 | Multiprocessor system and methods for transmitting memory access transactions for the same | Yuji Tsushima, Hideya Akashi, Keitaro Uehara, Naoki Hamanaka, Tetsuhiko Okada +1 more | 2003-02-04 |
| 6438653 | Cache memory control circuit including summarized cache tag memory summarizing cache tag information in parallel processor system | Hideya Akashi, Toshio Okochi, Masamori Kashiyama | 2002-08-20 |
| 6088770 | Shared memory multiprocessor performing cache coherency | Toshiaki Tarui, Koichi Okazawa, Yasuyuki Okada, Toshio Okochi, Hideya Akashi | 2000-07-11 |
| 5504690 | Automatic logic designing method and system | Naohiro Kageyama, Rikako Suzuki, Takashi Okada, Kazuhiko Iijima, Hiroyuki Nakajima +2 more | 1996-04-02 |