Issued Patents All Time
Showing 51–71 of 71 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7363427 | Memory controller connection to RAM using buffer interface | Theodore Briggs, John Wastlick | 2008-04-22 |
| 7363402 | Data communications architecture employing parallel SERDES channels | Gregg B. Lesartre | 2008-04-22 |
| 7356678 | Security measures in a partitionable computing system | Mark Shaw, Vipul Gandhi, Richard Dickert Powers, Guy Kuntz, Ryan Weaver | 2008-04-08 |
| 7313749 | System and method for applying error correction code (ECC) erasure mode and clearing recorded information from a page deallocation table | John Nerl, Ken Pomaranski, Andrew C. Walton, David Soper | 2007-12-25 |
| 7308638 | System and method for controlling application of an error correction code (ECC) algorithm in a memory subsystem | John Nerl, Ken Pomaranski, Andrew C. Walton, David Soper | 2007-12-11 |
| 7296146 | Security measures in a partitionable computing system | Mark Shaw, Vipul Gandhi, Craig Warner | 2007-11-13 |
| 7277994 | Communication in partitioned computer systems | Nathan Zelle | 2007-10-02 |
| 7240174 | System and method for migrating data between memories | Mark Shaw | 2007-07-03 |
| 7216205 | Cache line ownership transfer in multi-processor computer systems | Christopher A. Greer, Michael Schroeder | 2007-05-08 |
| 7206889 | Systems and methods for enabling communications among devices in a multi-cache line size environment and disabling communications among devices of incompatible cache line sizes | Mark Shaw, Lisa Pallotti | 2007-04-17 |
| 7178015 | Security measures in a partitionable computing system | Mark Shaw, Vipul Gandhi, Leon Hong, Craig Warner, Paul Bouchier +9 more | 2007-02-13 |
| 7099977 | Processor interrupt filtering | Huai-ter Chong, Craig Warner | 2006-08-29 |
| 6959370 | System and method for migrating data between memories | Mark Shaw | 2005-10-25 |
| 6564306 | Apparatus and method for performing speculative cache directory tag updates | Michael K. Dugan, Mark A. Heap, Terry Huang, Curtis R. McAllister, Henry Yu | 2003-05-13 |
| 5832290 | Apparatus, systems and method for improving memory bandwidth utilization in vector processing systems | Matthew F. Barr, Ruth McGuffey, Russell L. Roan | 1998-11-03 |
| 5649144 | Apparatus, systems and methods for improving data cache hit rates | Gregory D. Brinson, Todd Beck, David L. Trawick | 1997-07-15 |
| 5159686 | Multi-processor computer system having process-independent communication register addressing | David M. Chastain, James E. Mankovich | 1992-10-27 |
| 5050070 | Multi-processor computer system having self-allocating processors | David M. Chastain, James E. Mankovich | 1991-09-17 |
| 4873629 | Instruction processing unit for computer | Michael Harris, David M. Chastain | 1989-10-10 |
| 4812972 | Microcode computer having dispatch and main control stores for storing the first and the remaining microinstructions of machine instructions | David M. Chastain | 1989-03-14 |
| 4620275 | Computer system | Steven Jeffrey Wallach, Thomas M. Jones, Frank J. Marshall, David A. Nobles, Kent Allen Fuka +19 more | 1986-10-28 |