Issued Patents All Time
Showing 25 most recent of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12242653 | Domain crossing in executing instructions in computer processors | — | 2025-03-04 |
| 12222869 | Memory access control through permissions specified in page table entries for execution domains | — | 2025-02-11 |
| 12197627 | Processors with security levels adjustable per applications | — | 2025-01-14 |
| 12169454 | Reduce data traffic between cache and memory via data access of variable sizes | — | 2024-12-17 |
| 12131178 | Dynamic configuration of a computer processor based on the presence of a hypervisor | — | 2024-10-29 |
| 12056057 | Security configurations in page table entries for execution domains | — | 2024-08-06 |
| 12019555 | Cache with set associativity having data defined cache sets | — | 2024-06-25 |
| 11954493 | Cache systems for main and speculative threads of processors | — | 2024-04-09 |
| 11941402 | Registers in vector processors to store addresses for accessing vectors | — | 2024-03-26 |
| 11934836 | Shadow cache for securing conditional speculative instruction execution | — | 2024-03-19 |
| 11914756 | Data protection in computer processors | — | 2024-02-27 |
| 11914726 | Access control for processor registers based on execution domains | — | 2024-02-27 |
| 11907158 | Vector processor with vector first and multiple lane configuration | — | 2024-02-20 |
| 11868274 | Key management in computer processors | — | 2024-01-09 |
| 11860786 | Data defined caches for speculative and normal executions | — | 2024-01-02 |
| 11775308 | Extended tags for speculative and normal executions | — | 2023-10-03 |
| 11734015 | Cache systems and circuits for syncing caches or cache sets | — | 2023-08-22 |
| 11720367 | Securing conditional speculative instruction execution | — | 2023-08-08 |
| 11681594 | Multi-lane solutions for addressing vector elements using vector index registers | — | 2023-06-20 |
| 11620239 | Domain register for instructions being executed in computer processors | — | 2023-04-04 |
| 11561904 | Security configurations in page table entries for execution domains | — | 2023-01-24 |
| 11561903 | Allocation of spare cache reserved during non-speculative execution and speculative execution | — | 2023-01-24 |
| 11544069 | Universal pointers for data exchange in a computer system having independent processors | — | 2023-01-03 |
| 11507374 | True/false vector index registers and methods of populating thereof | — | 2022-11-22 |
| 11500665 | Dynamic configuration of a computer processor based on the presence of a hypervisor | — | 2022-11-15 |