Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12039201 | Control parameter address virtualization | Tony M. Brewer | 2024-07-16 |
| 12008243 | Reducing index update messages for memory-based communication queues | Tony M. Brewer | 2024-06-11 |
| 11550719 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2023-01-10 |
| 10949347 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2021-03-16 |
| 10061699 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2018-08-28 |
| 9824010 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2017-11-21 |
| 9449659 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2016-09-20 |
| 9015399 | Multiple data channel memory module architecture | Tony M. Brewer, J. Michael Andrewartha, William D. O'Leary | 2015-04-21 |
| 7366854 | Systems and methods for scheduling memory requests utilizing multi-level arbitration | John Wastlick | 2008-04-29 |
| 6876657 | System and method for router packet control and ordering | Tony M. Brewer, Jim Kleiner, Gregory S. Palmer, Paul Vogel | 2005-04-05 |
| 6564306 | Apparatus and method for performing speculative cache directory tag updates | Gary Gostin, Mark A. Heap, Terry Huang, Curtis R. McAllister, Henry Yu | 2003-05-13 |