Issued Patents All Time
Showing 26–34 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6065081 | Administrator controlled architecture for disabling add-in card slots | James M. Mann, Brant W. Jones | 2000-05-16 |
| 6041401 | Computer system that places a cache memory into low power mode in response to special bus cycles executed on the bus | Jens K. Ramsey, Jeffrey C. Stevens, Michael E. Tubbs | 2000-03-21 |
| 5963431 | Desktop computer having enhanced motherboard/riser card assembly configuration | — | 1999-10-05 |
| 5951685 | Computer system with system ROM including serial-access PROM coupled to an auto-configuring memory controller and method of shadowing BIOS code from PROM | — | 1999-09-14 |
| 5897663 | Host I.sup.2 C controller for selectively executing current address reads to I.sup.2 C EEPROMs | — | 1999-04-27 |
| 5813022 | Circuit for placing a cache memory into low power mode in response to special bus cycles executed on the bus | Jens K. Ramsey, Jeffrey C. Stevens, Michael E. Tubbs | 1998-09-22 |
| 5751998 | Memory accessing system with portions of memory being selectively write protectable and relocatable based on predefined register bits and memory selection RAM outputs | Russell J. Wunderlich, Mark Taylor, Mikal C. Hunsaker, Brian V. Belmont | 1998-05-12 |
| 5559968 | Non-conforming PCI bus master timing compensation circuit | William M. Vaughn, Jeff W. Wolford | 1996-09-24 |
| 4884271 | Error checking and correcting for read-modified-write operations | Fernando Concha | 1989-11-28 |