Issued Patents All Time
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12332552 | Detachable camera and operation method thereof | Cheng-Cheng Yu, Han-Yen Chang | 2025-06-17 |
| 12225294 | Automatic tracking method and tracking system applied to pan-tilt-zoom camera device | Jen-Hung Yeh, Yi Yang | 2025-02-11 |
| 11561649 | Operation judgment method for interactive touch system | Chia-Feng Wu, Yun-Long Sie, Cheng-Cheng Yu | 2023-01-24 |
| 11523333 | Pairing and interconnecting method between electronic devices | Chia-Feng Wu, Jhan-Jhang LIAO, Lien-Kai Chou, Cheng-Cheng Yu, Cheng-Mou Tsai +1 more | 2022-12-06 |
| 11257540 | Write data processing methods associated with computational memory cells | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2022-02-22 |
| 11205476 | Read data processing circuits and methods associated with computational memory cells | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2021-12-21 |
| 11194519 | Results processing circuits and methods associated with computational memory cells | Bob Haig, Eli Ehrman, Dan Ilan, Patrick Chuang, Mu-Hsiang Huang | 2021-12-07 |
| 11194548 | Processing array device that performs one cycle full adder operation and bit line read/write logic features | Lee-Lean Shu, Bob Haig | 2021-12-07 |
| 11150903 | Computational memory cell and processing array device using memory cells | Lee-Lean Shu, Avidan Akerib | 2021-10-19 |
| 11094374 | Write data processing circuits and methods associated with computational memory cells | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2021-08-17 |
| 10943648 | Ultra low VDD memory cell with ratioless write port | Lee-Lean Shu, Patrick Chuang | 2021-03-09 |
| 10930341 | Processing array device that performs one cycle full adder operation and bit line read/write logic features | Lee-Lean Shu, Bob Haig | 2021-02-23 |
| 10910849 | Charging method and charging system | Jay Paul Lyons, Cheng-Che Hsieh, Chi-Fa Hsu, Lien-Kai Chou | 2021-02-02 |
| 10891076 | Results processing circuits and methods associated with computational memory cells | Bob Haig, Eli Ehrman, Dan Ilan, Patrick Chuang, Mu-Hsiang Huang | 2021-01-12 |
| 10877731 | Processing array device that performs one cycle full adder operation and bit line read/write logic features | Lee-Lean Shu, Bob Haig | 2020-12-29 |
| 10860318 | Computational memory cell and processing array device using memory cells | Lee-Lean Shu, Avidan Akerib | 2020-12-08 |
| 10854284 | Computational memory cell and processing array device with ratioless write port | Patrick Chuang, Lee-Lean Shu | 2020-12-01 |
| 10847212 | Read and write data processing circuits and methods associated with computational memory cells using two read multiplexers | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2020-11-24 |
| 10847213 | Write data processing circuits and methods associated with computational memory cells | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2020-11-24 |
| 10777262 | Read data processing circuits and methods associated memory cells | Bob Haig, Eli Ehrman, Mu-Hsiang Huang | 2020-09-15 |
| 10770133 | Read and write data processing circuits and methods associated with computational memory cells that provides write inhibits and read bit line pre-charge inhibits | Bob Haig, Eli Ehrman, Patrick Chuang, Mu-Hsiang Huang | 2020-09-08 |
| 10725777 | Computational memory cell and processing array device using memory cells | Lee-Lean Shu, Avidan Akerib | 2020-07-28 |
| 10637259 | Charging control system and short-circuit current protecting method thereof | Chi-Fa Hsu, Lien-Kai Chou, Cheng-Cheng Yu | 2020-04-28 |
| 10521229 | Computational memory cell and processing array device using memory cells | Lee-Lean Shu, Avidan Akerib | 2019-12-31 |
| 10498147 | Charging control system and power charging management method thereof | Chi-Fa Hsu, Lien-Kai Chou, Cheng-Cheng Yu, Jy-Shyan Lin | 2019-12-03 |