Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10223097 | Dynamic update of an application in compilation and deployment with cold-swapping | Arnaud Claude Weber, Stephanie Saad Cuthbertson, Christopher Matthew Warrington, Jerome Dochez, Torbjorn Norbye +3 more | 2019-03-05 |
| 10083025 | Dynamic update of an application in compilation and deployment with warm-swapping | Arnaud Claude Weber, Stephanie Saad Cuthbertson, Christopher Matthew Warrington, Jerome Dochez, Torbjorn Norbye +3 more | 2018-09-25 |
| 10067757 | Dynamic update of an application in compilation and deployment with hot-swapping | Arnaud Claude Weber, Stephanie Saad Cuthbertson, Christopher Matthew Warrington, Jerome Dochez, Torbjorn Norbye +3 more | 2018-09-04 |
| D827669 | Display screen or portion thereof with icon | Stephanie Saad Cuthbertson, Gerard Rocha Cutiller, Torbjorn Norbye, Cristina Bilsland, Arnaud Claude Weber +4 more | 2018-09-04 |
| D789412 | Display screen or portion thereof with icon | Stephanie Saad Cuthbertson, Gerard Rocha Cutiller, Torbjorn Norbye, Cristina Bilsland, Arnaud Claude Weber +4 more | 2017-06-13 |
| 8447957 | Coprocessor interface architecture and methods of operating the same | Jorge Ernesto Carrillo, Navaneethan Sundaramoorthy, Ralph D. Wittig, Vasanth Asokan | 2013-05-21 |
| 7840781 | Circuit arrangement for profiling a programmable processor connected via a uni-directional bus | Navaneethan Sundaramoorthy, Raj Nagarajan, Satish R. Ganesan | 2010-11-23 |
| 7606694 | Framework for cycle accurate simulation | Jorge Ernesto Carrillo, Satish R. Ganesan, Amit Kasat | 2009-10-20 |
| 6938146 | Memory power management using prefetch buffers | Hazim Shafi | 2005-08-30 |