Issued Patents All Time
Showing 76–82 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6697919 | System and method for limited fanout daisy chaining of cache invalidation requests in a shared-memory multiprocessor system | Kourosh Gharachorloo, Luiz Andre Barroso, Mosur K. Ravishankar, Andreas Nowatzyk | 2004-02-24 |
| 6675265 | Multiprocessor cache coherence system and method in which processor nodes and input/output nodes are equal participants | Luiz Andre Barroso, Kourosh Gharachorloo, Andreas Nowatzyk, Mosur K. Ravishankar | 2004-01-06 |
| 6640287 | Scalable multiprocessor system and cache coherence method incorporating invalid-to-dirty requests | Kourosh Gharachorloo, Luiz Andre Barroso, Mosur K. Ravishankar, Daniel J. Scales | 2003-10-28 |
| 6636949 | System for handling coherence protocol races in a scalable shared memory system based on chip multiprocessing | Luiz Andre Barroso, Kourosh Gharachorloo, Andreas Nowatzyk, Mosur K. Ravishankar | 2003-10-21 |
| 6622217 | Cache coherence protocol engine system and method for processing memory transaction in distinct address subsets during interleaved time periods in a multiprocessor system | Kourosh Gharachorloo, Luiz Andre Barroso, Mosur K. Ravishankar, Andreas Nowatzyk | 2003-09-16 |
| 6622218 | Cache coherence protocol engine and method for efficient processing of interleaved memory transactions in a multiprocessor system | Kourosh Gharachorloo, Luiz Andre Barroso, Mosur K. Ravishankar | 2003-09-16 |
| 6341339 | Apparatus and method for maintaining data coherence within a cluster of symmetric multiprocessors | Leonidas Kontothanassis, Michael Scott, Sandhya Dwarkadas, Nikos Hardavellas, Galen C. Hunt | 2002-01-22 |