Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424471 | Wafer boats for supporting semiconductor wafers in a furnace | Sumeet S. Bhagavat | 2025-09-23 |
| 12046495 | Wafer boats for supporting semiconductor wafers in a furnace | Sumeet S. Bhagavat | 2024-07-23 |
| 11798802 | Methods for stripping and cleaning semiconductor structures | Haihe Liang, Junting Yang | 2023-10-24 |
| 11239107 | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency | Gang Wang, Jeffrey L. Libbert, Shawn George Thomas | 2022-02-01 |
| 11183420 | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss | — | 2021-11-23 |
| 11145538 | High resistivity silicon-on-insulator structure and method of manufacture thereof | Jeffery L. Libbert, Gang Wang, Andrew M. Jones | 2021-10-12 |
| 10832937 | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency | Gang Wang, Jeffrey L. Libbert, Shawn George Thomas | 2020-11-10 |
| 10811308 | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss | — | 2020-10-20 |
| 10796945 | High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He—N2 co-implantation | Robert W. Standley | 2020-10-06 |
| 10741437 | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency | Gang Wang, Jeffrey L. Libbert, Shawn George Thomas | 2020-08-11 |
| 10546771 | High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency | Gang Wang, Jeffrey L. Libbert, Shawn George Thomas | 2020-01-28 |
| 10483379 | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss | Gang Wang | 2019-11-19 |
| 10468295 | High resistivity silicon-on-insulator structure and method of manufacture thereof | Jeffery L. Libbert, Gang Wang, Andrew M. Jones | 2019-11-05 |
| 10458709 | Semiconductor wafer support ring for heat treatment | William L. Luter, Shawn George Thomas | 2019-10-29 |
| 10403541 | High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He—N2 co-implantation | Robert W. Standley | 2019-09-03 |
| 10312134 | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss | — | 2019-06-04 |
| 10224233 | High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed by He-N2 co-implantation | Robert W. Standley | 2019-03-05 |
| 10072892 | Semiconductor wafer support ring for heat treatment | William L. Luter, Shawn George Thomas | 2018-09-11 |
| 9899499 | High resistivity silicon-on-insulator wafer manufacturing method for reducing substrate loss | Gang Wang | 2018-02-20 |
| 9853133 | Method of manufacturing high resistivity silicon-on-insulator substrate | Shawn George Thomas | 2017-12-26 |
| 9202711 | Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness | Jeffrey L. Libbert | 2015-12-01 |