TM

Tony Mule

GR Georgia Tech Research: 7 patents #102 of 2,755Top 4%
IN Intel: 1 patents #18,218 of 30,777Top 60%
Overall (All Time): #656,463 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7649264 Hard mask for low-k interlayer dielectric patterning Magdy S. Abdelrahman 2010-01-19
7554347 High input/output density optoelectronic probe card for wafer-level test of electrical and optical interconnect components, methods of fabrication, and methods of use Hiren D. Thacker, Muhannad Bakir, James D. Meindl, Thomas K. Gaylord, Kevin P. Martin +1 more 2009-06-30
7016569 Back-side-of-die, through-wafer guided-wave optical clock distribution networks, method of fabrication thereof, and uses thereof James D. Meindl, Thomas K. Gaylord 2006-03-21
6954576 Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package Chirag S. Patel, James D. Meindl, Thomas K. Gaylord, Elias N. Glytsis, Kevin P. Martin +4 more 2005-10-11
6947651 Optical waveguides formed from nano air-gap inter-layer dielectric materials and methods of fabrication thereof Paul A. Kohl, James D. Meindl, Agnes Padovani, Thomas K. Gaylord, Elias N. Glytsis +1 more 2005-09-20
6807352 Optical waveguides with embedded air-gap cladding layer and methods of fabrication thereof James D. Meindl, Thomas K. Gaylord, Elias N. Glytsis, Paul A. Kohl 2004-10-19
6788867 Backplane, printed wiring board, and/or multi-chip module-level optical interconnect layer having embedded air-gap technologies and methods of fabrication James D. Meindl, Paul A. Kohl, Stephen M. Schultz, Thomas K. Gaylord, Elias N. Glytsis +3 more 2004-09-07
6785458 Guided-wave optical interconnections embedded within a microelectronic wafer-level batch package Chirag S. Patel, James D. Meindl, Thomas K. Gaylord, Elias N. Glytsis, Kevin P. Martin +4 more 2004-08-31