Issued Patents All Time
Showing 51–67 of 67 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6046078 | Semiconductor device fabrication with reduced masking steps | Fwu-Iuan Hshieh | 2000-04-04 |
| 6025230 | High speed MOSFET power device with enhanced ruggedness fabricated by simplified processes | Fwu-Iuan Hshieh | 2000-02-15 |
| 5998266 | Method of forming a semiconductor structure having laterally merged body layer | — | 1999-12-07 |
| 5986304 | Punch-through prevention in trenched DMOS with poly-silicon layer covering trench corners | Fwu-Iuan Hshieh, True-Lon Lin | 1999-11-16 |
| 5960275 | Power MOSFET fabrication process to achieve enhanced ruggedness, cost savings, and product reliability | Fwu-Iuan Hshieh | 1999-09-28 |
| 5923065 | Power MOSFET device manufactured with simplified fabrication processes to achieve improved ruggedness and product cost savings | Danny Chi Nim, True-Lon Lin, Fwu-Iuan Hshieh, Yan Man Tsui | 1999-07-13 |
| 5907169 | Self-aligned and process-adjusted high density power transistor with gate sidewalls provided with punch through prevention and reduced JFET resistance | Fwu-Iuan Hshieh, True-Lon Lin | 1999-05-25 |
| 5907776 | Method of forming a semiconductor structure having reduced threshold voltage and high punch-through tolerance | Fwu-Iuan Hshieh | 1999-05-25 |
| 5895951 | MOSFET structure and fabrication process implemented by forming deep and narrow doping regions through doping trenches | Yan Man Tsui, Fwu-Iuan Hshieh, True-Lon Lin, Danny Chi Nim | 1999-04-20 |
| 5883410 | Edge wrap-around protective extension for covering and protecting edges of thick oxide layer | Fwu-Iuan Hshieh, Danny Chi Nim, Yan Man Tsui | 1999-03-16 |
| 5883416 | Gate-contact structure to prevent contact metal penetration through gate layer without affecting breakdown voltage | True-Lon Lin, Fwu-Iuan Hshieh, Yan Man Tsui | 1999-03-16 |
| 5877529 | Mosfet termination design and core cell configuration to increase breakdown voltage and to improve device ruggedness | Danny Chi Nim, Fwu-Iuan Hshieh, Yan Man Tsui, True-Lon Lin, Shu-Hui Cheng | 1999-03-02 |
| 5877528 | Structure to provide effective channel-stop in termination areas for trenched power transistors | — | 1999-03-02 |
| 5763915 | DMOS transistors having trenched gate oxide | Fwu-Juan Hshieh, True-Lon Lin, Danny Chi Nim, Yan Man Tsui | 1998-06-09 |
| 5747853 | Semiconductor structure with controlled breakdown protection | Fwu-Iuan Hshieh, Danny Chi Nim, True-Lon Line, Yan Man Ysui | 1998-05-05 |
| 5729037 | MOSFET structure and fabrication process for decreasing threshold voltage | Fwu-Iuan Hshieh, Yan Man Tsui, True-Lon Lin, Danny Chi Nim | 1998-03-17 |
| 5668026 | DMOS fabrication process implemented with reduced number of masks | True-Lon Lin, Fwu-Iuan Hshieh, Danny Chi Nim, Yan Man Tsui | 1997-09-16 |