Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8839210 | Program performance analysis apparatus | Teruhiko Kamigata, Shigeru Kimura | 2014-09-16 |
| 8549227 | Multiprocessor system and operating method of multiprocessor system | Shinichiro Tago | 2013-10-01 |
| 8181171 | Method and apparatus for analyzing large scale program and generation of code from degenerated program dependence graph | Makiko Ito, Hideo Miyake | 2012-05-15 |
| 7581090 | Interrupt control apparatus and method | Hideo Miyake, Yasuki Nakamura | 2009-08-25 |
| 7401204 | Parallel Processor efficiently executing variable instruction word | Hideo Miyake, Yasuki Nakamura, Yoshimasa Takebe | 2008-07-15 |
| 7376820 | Information processing unit, and exception processing method for specific application-purpose operation instruction | Michihide Kimura, Hideo Miyake, Satoshi Imai, Yasuki Nakamura | 2008-05-20 |
| 7134004 | Processing device for buffering sequential and target sequences and target address information for multiple branch instructions | Shin-ichiro Tago, Taizo Sato, Yoshimasa Takebe, Yasuhiro Yamazaki, Teruhiko Kamigata +2 more | 2006-11-07 |
| 7028151 | Information processing device equipped with improved address queue register files for cache miss | Satoshi Imai, Fumihiko Hayakawa | 2006-04-11 |
| 6889315 | Processor and method of controlling the same | Hideo Miyake, Yasuki Nakamura | 2005-05-03 |
| 6868472 | Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory | Hideo Miyake, Yasuki Nakamura, Teruhiko Kamigata, Hitoshi Yoda, Hiroshi Okano +1 more | 2005-03-15 |
| 6775762 | Processor and processor system | Hideo Miyake, Yasuki Nakamura | 2004-08-10 |
| 6681280 | Interrupt control apparatus and method separately holding respective operation information of a processor preceding a normal or a break interrupt | Hideo Miyake, Yasuki Nakamura | 2004-01-20 |
| 6516407 | Information processor | Toshihiro Ozawa | 2003-02-04 |
| 6374334 | Data processing apparatus with a cache controlling device | Akitoshi Ino, Tsutomu Tanaka, Hideki Sakata | 2002-04-16 |
| 6078993 | Data supplying apparatus for independently performing hit determination and data access | Takuya Iwata | 2000-06-20 |
| 6076145 | Data supplying apparatus for independently performing hit determination and data access | Takuya Iwata | 2000-06-13 |
| 5828860 | Data processing device equipped with cache memory and a storage unit for storing data between a main storage or CPU cache memory | Hitoshi Miyaoku, Koichi Sasamori, Kazuhide Yoshino | 1998-10-27 |