Issued Patents All Time
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7134004 | Processing device for buffering sequential and target sequences and target address information for multiple branch instructions | Shin-ichiro Tago, Taizo Sato, Yoshimasa Takebe, Yasuhiro Yamazaki, Teruhiko Kamigata +2 more | 2006-11-07 |
| 6868472 | Method of Controlling and addressing a cache memory which acts as a random address memory to increase an access speed to a main memory | Hideo Miyake, Atsuhiro Suga, Yasuki Nakamura, Teruhiko Kamigata, Hiroshi Okano +1 more | 2005-03-15 |
| 6823406 | Microprocessor executing a program to guarantee an access order | Hiroyuki Utsumi, Yasuhiro Yamazaki | 2004-11-23 |
| 6760810 | Data processor having instruction cache with low power consumption | Yasuhiro Yamazaki, Taizoh Satoh, Hiroyuki Utsumi | 2004-07-06 |