Issued Patents All Time
Showing 26–50 of 82 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9831338 | Alternating source region arrangement | Xin Lin, Hongning Yang, Jiang-Kai Zuo | 2017-11-28 |
| 9761707 | Laterally diffused MOSFET with isolation region | Xin Lin, Hongning Yang | 2017-09-12 |
| 9397233 | High voltage deep trench capacitor | Vishnu Khemka, Amitava Bose, Todd C. Roggenbauer | 2016-07-19 |
| 9209277 | Manufacturing methods for laterally diffused metal oxide semiconductor devices | Tahir A. Khan, Bernhard Grote, Vishnu Khemka | 2015-12-08 |
| 9196681 | Metal oxide semiconductor field effect transistor with reduced surface field folding | Vishnu Khemka, Tahir A. Khan, Vijay Parthasarathy | 2015-11-24 |
| 9196680 | Metal oxide semiconductor field effect transistor with reduced surface field folding | Vishnu Khemka, Tahir A. Khan, Vijay Parthasarathy | 2015-11-24 |
| 8969958 | Integrated MOS power transistor with body extension region for poly field plate depletion assist | Vishnu Khemka, Tahir A. Khan, Bernhard Grote | 2015-03-03 |
| 8963241 | Integrated MOS power transistor with poly field plate extension for depletion assist | Vishnu Khemka, Tahir A. Khan, Bernhard Grote | 2015-02-24 |
| 8907419 | LDMOS with enhanced safe operating area (SOA) and method therefor | Tahir A. Khan, Vishnu Khemka | 2014-12-09 |
| 8816434 | Laterally double diffused metal oxide semiconductor transistors having a reduced surface field structures | Bernhard Grote, Tahir A. Khan, Vishnu Khemka | 2014-08-26 |
| 8623732 | Methods of making laterally double diffused metal oxide semiconductor transistors having a reduced surface field structure | Bernhard Grote, Tahir A. Khan, Vishnu Khemka | 2014-01-07 |
| 8384184 | Laterally diffused metal oxide semiconductor device | Tahir A. Khan, Bernhard Grote, Vishnu Khemka | 2013-02-26 |
| 8344472 | Semiconductor device and method | Vishnu Khemka, Tahir A. Khan, Weixiao Huang | 2013-01-01 |
| 8338872 | Electronic device with capcitively coupled floating buried layer | Vishnu Khemka, Tahir A. Khan, Weixiao Huang, Bernhard Grote | 2012-12-25 |
| 8330220 | LDMOS with enhanced safe operating area (SOA) and method therefor | Tahir A. Khan, Vishnu Khemka | 2012-12-11 |
| 8278710 | Guard ring integrated LDMOS | Vishnu Khemka, Stephen J. Cosentino, Tahir A. Khan, Adolfo C. Reyes | 2012-10-02 |
| 8193585 | Semiconductor device with increased snapback voltage | Bernhard Grote, Vishnu Khemka, Tahir A. Khan, Weixiao Huang | 2012-06-05 |
| 8188543 | Electronic device including a conductive structure extending through a buried insulating layer | Todd C. Roggenbauer, Vishnu Khemka, Amitava Bose, Paul Hui, Xiaoqiu Huang | 2012-05-29 |
| 8134222 | MOS capacitor structures | Tahir A. Khan, Amitava Bose, Vishnu Khemka | 2012-03-13 |
| 7851857 | Dual current path LDMOSFET with graded PBL for ultra high voltage smart power applications | Yue Fu, Vishnu Khemka, Amitava Bose, Todd C. Roggenbauer | 2010-12-14 |
| 7851889 | MOSFET device including a source with alternating P-type and N-type regions | Amitava Bose, Vishnu Khemka, Todd C. Roggenbauer | 2010-12-14 |
| 7838383 | Methods for forming MOS capacitors | Tahir A. Khan, Amitava Bose, Vishnu Khemka | 2010-11-23 |
| 7820519 | Process of forming an electronic device including a conductive structure extending through a buried insulating layer | Todd C. Roggenbauer, Vishnu Khemka, Amitava Bose, Paul Hui, Xiaoqiu Huang +1 more | 2010-10-26 |
| 7791161 | Semiconductor devices employing poly-filled trenches | Vishnu Khemka, Amitava Bose | 2010-09-07 |
| 7777257 | Bipolar Schottky diode and method | Vishnu Khemka, Amitava Bose, Todd C. Roggenbauer | 2010-08-17 |