Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8278710 | Guard ring integrated LDMOS | Vishnu Khemka, Tahir A. Khan, Adolfo C. Reyes, Ronghua Zhu | 2012-10-02 |
| 5225365 | Method of making a substantially planar semiconductor surface | — | 1993-07-06 |
| 5037768 | Method of fabricating a double polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors | — | 1991-08-06 |
| 4983531 | Method of fabricating a single polysilicon bipolar transistor which is compatible with a method of fabricating CMOS transistors | — | 1991-01-08 |
| 4808555 | Multiple step formation of conductive material layers | Richard W. Mauntel, Louis C. Parrillo, Patrick J. Holly | 1989-02-28 |
| 4745086 | Removable sidewall spacer for lightly doped drain formation using one mask level and differential oxidation | Louis C. Parrillo, Richard W. Mauntel | 1988-05-17 |
| 4722909 | Removable sidewall spacer for lightly doped drain formation using two mask levels | Louis C. Parrillo, Richard W. Mauntel | 1988-02-02 |
| 4717683 | CMOS process | Louis C. Parrillo, Bridgette A. Bergami | 1988-01-05 |
| 4701775 | Buried n.sup.- channel implant for NMOS transistors | James M. Rugg, Richard W. Mauntel | 1987-10-20 |