Issued Patents All Time
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7416945 | Method for forming a split gate memory device | Ramachandran Muralidhar, Matthew T. Herrick, Narayanan C. Ramani, Robert F. Steimle | 2008-08-26 |
| 7361567 | Non-volatile nanocrystal memory and method therefor | Ramachandran Muralidhar, Bruce E. White | 2008-04-22 |
| 7265059 | Multiple fin formation | Leo Mathew | 2007-09-04 |
| 7241695 | Semiconductor device having nano-pillars and method therefor | Leo Mathew, Ramachandran Muralidhar | 2007-07-10 |
| 7186616 | Method of removing nanoclusters in a semiconductor device | Ramachandran Muralidhar, Robert F. Steimle | 2007-03-06 |
| 7183159 | Method of forming an integrated circuit having nanocluster devices and non-nanocluster devices | Robert F. Steimle | 2007-02-27 |
| 7160775 | Method of discharging a semiconductor device | Erwin J. Prinz, Ramachandran Muralidhar, Michael A. Sadd, Robert F. Steimle, Craig T. Swift +1 more | 2007-01-09 |
| 7091130 | Method of forming a nanocluster charge storage device | Ramachandran Muralidhar, Robert F. Steimle, Gowrishankar L. Chindalore | 2006-08-15 |
| 6969883 | Non-volatile memory having a reference transistor | Gowrishankar L. Chindalore, Jane A. Yater | 2005-11-29 |
| 6958265 | Semiconductor device with nanoclusters | Robert F. Steimle, Ramachandran Muralidhar, Wayne M. Paulson, Bruce E. White, Erwin J. Prinz | 2005-10-25 |
| 6955967 | Non-volatile memory having a reference transistor and method for forming | Gowrishankar L. Chindalore, Jane A. Yater | 2005-10-18 |
| 6839280 | Variable gate bias for a reference transistor in a non-volatile memory | Gowrishankar L. Chindalore, Jane A. Yater | 2005-01-04 |
| 6808986 | Method of forming nanocrystals in a memory device | Ramachandran Muralidhar, Tushar P. Merchant | 2004-10-26 |
| 6784103 | Method of formation of nanocrystals on a semiconductor structure | Tushar P. Merchant, Ramachandran Muralidhar | 2004-08-31 |