Issued Patents All Time
Showing 51–75 of 92 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8451041 | Charge-injection sense-amp logic | Jason Su, Yuntian Chen | 2013-05-28 |
| 8423841 | Method and systems for memory testing and test data reporting during memory testing | Albert Wu, Chorng-Lii Liou | 2013-04-16 |
| 8339195 | Circuits and methods for calibrating offset in an amplifier | Peter Wung Lee | 2012-12-25 |
| 8335878 | Multiport memory architecture, devices and systems including the same, and methods of using the same | Sehat Sutardja, Donald Pannell | 2012-12-18 |
| 8203902 | System and method for memory array decoding | Pantas Sutardja | 2012-06-19 |
| 8030128 | Method to form high density phase change memory (PCM) top contact every two bits | Pantas Sutardja, Albert Wu, Runzi Chang, Chien-Chuan Wei, Peter Wung Lee | 2011-10-04 |
| 8004926 | System and method for memory array decoding | Pantas Sutardja | 2011-08-23 |
| 7994052 | High-density patterning | Pantas Sutardja, Albert Wu, Peter Wung Lee, Chien-Chuan Wei, Runzi Chang | 2011-08-09 |
| 7985616 | Methods to form wide heater trenches and to form memory cells to engage heaters | Pantas Sutardja, Albert Wu, Chien-Chuan Wei, Runzi Chang, Peter Wung Lee | 2011-07-26 |
| 7958413 | Method and system for memory testing and test data reporting during memory testing | Albert Wu, Chorng-Lii Liou | 2011-06-07 |
| 7952920 | Phase change memory array circuits and methods of manufacture | Peter Wung Lee | 2011-05-31 |
| 7939414 | Ion implantation and process sequence to form smaller base pick-up | Pantas Sutardja, Albert Wu, Chien-Chuan Wei, Runzi Chang, Peter Wung Lee | 2011-05-10 |
| 7939445 | High density via and metal interconnect structures, and methods of forming the same | Pantas Sutardja, Albert Wu, Peter Wung Lee, Chien-Chuan Wei, Runzi Chang | 2011-05-10 |
| 7888166 | Method to form high efficiency GST cell using a double heater cut | Pantas Sutardja, Albert Wu, Runzi Chang, Chien-Chuan Wei, Peter Wung Lee | 2011-02-15 |
| 7863709 | Low base resistance bipolar junction transistor array | Pantas Sutardja, Albert Wu, Runzi Chang, Chien-Chuan Wei, Peter Wung Lee | 2011-01-04 |
| 7839672 | Phase change memory array circuits and methods of manufacture | Peter Wung Lee | 2010-11-23 |
| 7807539 | Ion implantation and process sequence to form smaller base pick-up | Pantas Sutardja, Albert Wu, Chien-Chuan Wei, Runzi Chang, Peter Wung Lee | 2010-10-05 |
| 7745809 | Ultra high density phase change memory having improved emitter contacts, improved GST cell reliability and highly matched UHD GST cells using column mirco-trench strips | Pantas Sutardja, Albert Wu, Chien-Chuan Wei, Runzi Chang, Peter Wung Lee | 2010-06-29 |
| 7734966 | Method and system for memory testing and test data reporting during memory testing | Albert Wu, Chorng-Lii Liou | 2010-06-08 |
| 7709835 | Method to form high efficiency GST cell using a double heater cut | Pantas Sutardja, Albert Wu, Runzi Chang, Chien-Chuan Wei, Peter Wung Lee | 2010-05-04 |
| 7609538 | Logic process DRAM | Peter Wung Lee, Sehat Sutardja | 2009-10-27 |
| 7596011 | Logic process DRAM | Peter Wung Lee, Sehat Sutardja | 2009-09-29 |
| 7571287 | Multiport memory architecture, devices and systems including the same, and methods of using the same | Sehat Sutardja, Donald Pannell | 2009-08-04 |
| 7184290 | Logic process DRAM | Peter Wung Lee, Sehat Sutardja | 2007-02-27 |
| 6947324 | Logic process DRAM | Peter Wung Lee, Sehat Sutardja | 2005-09-20 |