RW

Richard T. Witek

DE Digital Equipment: 22 patents #11 of 2,100Top 1%
Apple: 4 patents #6,306 of 18,612Top 35%
AM AMD: 3 patents #3,141 of 9,279Top 35%
AM Amazon: 2 patents #7,121 of 19,158Top 40%
CC Compaq Computer: 2 patents #518 of 1,604Top 35%
📍 Redmond, WA: #267 of 8,547 inventorsTop 4%
🗺 Washington: #2,225 of 76,902 inventorsTop 3%
Overall (All Time): #106,262 of 4,157,543Top 3%
33
Patents All Time

Issued Patents All Time

Showing 26–33 of 33 patents

Patent #TitleCo-InventorsDate
5291581 Apparatus and method for synchronization of access to main memory signal groups in a multiprocessor data processing system David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza 1994-03-01
5278840 Apparatus and method for data induced condition signalling David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza 1994-01-11
5218712 Providing a data processor with a user-mode accessible mode of operations in which the processor performs processing operations without interruption David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza 1993-06-08
5193167 Ensuring data integrity by locked-load and conditional-store operations in a multiprocessor system Richard L. Sites 1993-03-09
5148536 Pipeline having an integral cache which processes cache misses and loads data in parallel Douglas D. Williams, Timothy J. Stanley, David Fenwick, Douglas J. Burns, Rebecca L. Stamm +1 more 1992-09-15
5148544 Apparatus and method for control of asynchronous program interrupt events in a data processing system David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza 1992-09-15
5063497 Apparatus and method for recovering from missing page faults in vector data processing operations David N. Cutler, David A. Orbits, Dileep Bhandarkar, Wayne Cardoza 1991-11-05
5043886 Load/store with write-intent for write-back caches George Michael Uhler 1991-08-27