MA

Michael C. Adler

DE Digital Equipment: 7 patents #143 of 2,100Top 7%
IN Intel: 6 patents #6,151 of 30,777Top 20%
AM AMD: 1 patents #5,683 of 9,279Top 65%
HP HP: 1 patents #8,774 of 16,619Top 55%
Overall (All Time): #313,506 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12112204 Modular accelerator function unit (AFU) design, discovery, and reuse Pratik M. Marolia, Aaron J. Grier, Henry Mitchel, Joseph Grecco, Utkarsh Y. Kakaiya +3 more 2024-10-08
11416300 Modular accelerator function unit (AFU) design, discovery, and reuse Pratik M. Marolia, Aaron J. Grier, Henry Mitchel, Joseph Grecco, Utkarsh Y. Kakaiya +3 more 2022-08-16
11194753 Platform interface layer and protocol for accelerators Pratik M. Marolia, Stephen S. Chang, Nagabhushan Chitlur 2021-12-07
10853276 Executing distributed memory operations using processing elements connected by distributed channels Bushra Ahsan, Neal C. Crago, Joel S. Emer, Aamer Jaleel, Angshuman Parashar +1 more 2020-12-01
10387319 Processors, methods, and systems for a configurable spatial accelerator with memory system performance, power reduction, and atomics support features Chiachen Chou, Neal C. Crago, Kermin Fleming, Kent D. Glossop, Aamer Jaleel +3 more 2019-08-20
10331583 Executing distributed memory operations using processing elements connected by distributed channels Bushra Ahsan, Neal C. Crago, Joel S. Emer, Aamer Jaleel, Angshuman Parashar +1 more 2019-06-25
6978462 Profiling execution of a sequence of events occuring during a profiled execution interval that matches time-independent selection criteria of events to be profiled John S. Yates, Jr., David L. Reese, Paul H. Hohensee, Stephen C. Purcell 2005-12-20
6704861 Mechanism for executing computer instructions in parallel Francis X. McKeen, Joel S. Emer, Robert P. Nix, David J. Sager, P. Geoffrey Lowney 2004-03-09
5923863 Software mechanism for accurately handling exceptions generated by instructions scheduled speculatively due to branch elimination Steven O. Hobbs, Paul Geoffrey Lowney 1999-07-13
5901308 Software mechanism for reducing exceptions generated by speculatively scheduled instructions Robert S. Cohn, Paul Geoffrey Lowney 1999-05-04
5634023 Software mechanism for accurately handling exceptions generated by speculatively scheduled instructions Steven O. Hobbs, Paul Geoffrey Lowney 1997-05-27
5627981 Software mechanism for accurately handling exceptions generated by instructions scheduled speculatively due to branch elimination Steven O. Hobbs, Paul Geoffrey Lowney 1997-05-06
5428807 Method and apparatus for propagating exception conditions of a computer system Francis X. McKeen, Joel S. Emer, Robert P. Nix, David J. Sager, P. Geoffrey Lowny 1995-06-27
5420990 Mechanism for enforcing the correct order of instruction execution Francis X. McKeen, Joel S. Emer, Robert P. Nix, David J. Sager, P. Geoffrey Lowney 1995-05-30
5421022 Apparatus and method for speculatively executing instructions in a computer system Francis X. McKeen, Joel S. Emer, Robert P. Nix, David J. Sager, P. Geoffrey Lowney 1995-05-30