Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5408641 | Programmable data transfer timing | John J. Lynch, James E. Tessari | 1995-04-18 |
| 5371874 | Write-read/write-pass memory subsystem cycle | Kumar Chinnaswamy, John J. Lynch, James E. Tessari | 1994-12-06 |
| 5335337 | Programmable data transfer timing | John J. Lynch, James E. Tessari | 1994-08-02 |
| 5313623 | Method and apparatus for performing diagnosis scanning of a memory unit regardless of the state of the system clock and without affecting the store data | Kumar Chinnaswamy, Hansel A. Collins, Michael B. Evans, Timothy P. Fissette, John J. Lynch +1 more | 1994-05-17 |
| 5255381 | Mode switching for a memory system with diagnostic scan | Kumar Chinnaswamy, Hansel A. Collins, Michael B. Evans, Timothy P. Fissette, John J. Lynch +1 more | 1993-10-19 |
| 5235693 | Method and apparatus for reducing buffer storage in a read-modify-write operation | Kumar Chinnaswamy, Paul M. Goodwin, John J. Lynch, James E. Tessari | 1993-08-10 |
| 5185875 | Method and apparatus for reducing memory read latency in a shared memory system with multiple processors | Kumar Chinnaswamy, John J. Lynch, James E. Tessari | 1993-02-09 |
| 5043874 | Memory configuration for use with means for interfacing a system control unit for a multi-processor system with the system main memory | James E. Tessari, John J. Lynch, Kumar Chinnaswamy | 1991-08-27 |
| 5014273 | Bad data algorithm | Paul M. Goodwin, Donald W. Smelser | 1991-05-07 |
| 5008886 | Read-modify-write operation | Kumar Chinnaswamy, Paul M. Goodwin, John J. Lynch, James E. Tessari | 1991-04-16 |