KS

Kenneth M. Sautter

CM Cubic Memory: 14 patents #1 of 6Top 20%
YS Yield Engineering Systems: 7 patents #3 of 29Top 15%
GC Gca: 1 patents #9 of 45Top 20%
VC Vertical Circuits: 1 patents #12 of 20Top 60%
Overall (All Time): #168,678 of 4,157,543Top 5%
24
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12330228 Method of using processing oven Lei Jing, M Ziaul Karim, Kang Song 2025-06-17
11919036 Method of improving the adhesion strength of metal-organic interfaces in electronic devices — 2024-03-05
11850672 Method of using processing oven Lei Jing, M Ziaul Karim, Kang Song 2023-12-26
11818849 Increasing adhesion of metal-organic interfaces by silane vapor treatment Syndee Young, Charudatta Galande 2023-11-14
11465225 Method of using processing oven Lei Jing, M Ziaul Karim, Kang Song 2022-10-11
11456274 Method of using a processing oven M Ziaul Karim, Lei Jing 2022-09-27
8361548 Method for efficient coating of substrates including plasma cleaning and dehydration William A. Moffat 2013-01-29
6486528 Silicon segment programming apparatus and three terminal fuse configuration David V. Pedersen, Michael G. Finley 2002-11-26
6255726 Vertical interconnect process for silicon segments with dielectric isolation Alfons Vindasius 2001-07-03
6188126 Vertical interconnect process for silicon segments David V. Pedersen, Michael G. Finley 2001-02-13
6177296 Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform Alfons Vindasius 2001-01-23
6134118 Conductive epoxy flip-chip package and method David V. Pedersen, Michael G. Finley 2000-10-17
6124633 Vertical interconnect process for silicon segments with thermally conductive epoxy preform Alfons Vindasius 2000-09-26
6080596 Method for forming vertical interconnect process for silicon segments with dielectric isolation Alfons Vindasius 2000-06-27
5994170 Silicon segment programming method David V. Pedersen, Michael G. Finley 1999-11-30
5936302 Speaker diaphragm David V. Pedersen, Michael G. Finley 1999-08-10
5891761 Method for forming vertical interconnect process for silicon segments with thermally conductive epoxy preform Alfons Vindasius 1999-04-06
5837566 Vertical interconnect process for silicon segments David V. Pedersen, Michael G. Finley 1998-11-17
5698895 Silicon segment programming method and apparatus David V. Pedersen, Michael G. Finley 1997-12-16
5675180 Vertical interconnect process for silicon segments David V. Pedersen, Michael G. Finley 1997-10-07
5661087 Vertical interconnect process for silicon segments David V. Pedersen, Michael G. Finley 1997-08-26
5657206 Conductive epoxy flip-chip package and method David V. Pedersen, Michael G. Finley 1997-08-12
4977330 In-line photoresist thickness monitor Tom W. Batchelder, Gary H. Memovich 1990-12-11
4647172 Resist development method William T. Batchelder, John A. Piatt 1987-03-03