BH

Barry A. Hoberman

CM Conversant Intellectual Property Management: 9 patents #8 of 73Top 15%
MI Mosaid Technologies Incorporated: 9 patents #23 of 170Top 15%
AM AMD: 6 patents #1,863 of 9,279Top 25%
CT Crocus Technology: 6 patents #7 of 35Top 20%
MM Monolithic Memories: 4 patents #7 of 45Top 20%
SM Spin Memory: 3 patents #29 of 49Top 60%
📍 Cupertino, CA: #370 of 6,989 inventorsTop 6%
🗺 California: #11,767 of 386,348 inventorsTop 4%
Overall (All Time): #82,583 of 4,157,543Top 2%
39
Patents All Time

Issued Patents All Time

Showing 26–39 of 39 patents

Patent #TitleCo-InventorsDate
7415680 Power managers for an integrated circuit Daniel L. Hillman, Jon Shiell 2008-08-19
7348804 Low leakage and data retention circuitry Daniel L. Hillman, William G. Walker, John M. Callahan, Michael A. Zampaglione, Andrew Cole 2008-03-25
7227383 Low leakage and data retention circuitry Daniel L. Hillman, William G. Walker, John M. Callahan, Michael A. Zampaglione, Andrew Cole 2007-06-05
7051306 Managing power on integrated circuits using power islands Daniel L. Hillman, Jon Shiell 2006-05-23
5490257 RAM based FIFO memory half-full detection apparatus and method Stuart T. Auvinen, Patrick Wang, David T. Wang 1996-02-06
4954987 Interleaved sensing system for FIFO and burst-mode memories Stuart T. Auvinen 1990-09-04
4947060 High speed complimentary output stage utilizing current steering transistors and a single current source William E. Moss 1990-08-07
4864165 ECL programmable logic array with direct testing means for verification of programmed state William E. Moss 1989-09-05
4862419 High speed pointer based first-in-first-out memory 1989-08-29
4814646 Programmable logic array using emitter-coupled logic William E. Moss 1989-03-21
4802122 Fast flush for a first-in first-out memory Stuart T. Auvinen 1989-01-31
4725979 Emitter coupled logic circuit having fuse programmable latch/register bypass 1988-02-16
4642797 High speed first-in-first-out memory 1987-02-10
4574367 Memory cell and array William E. Moss 1986-03-04