JH

James E. Hicks

CC Compaq Computer: 9 patents #105 of 1,604Top 7%
RC Rca: 8 patents #132 of 1,739Top 8%
DE Digital Equipment: 7 patents #143 of 2,100Top 7%
MA Mitsubishi Digital Electronics America: 4 patents #11 of 33Top 35%
C/ C/Hca: 3 patents #28 of 130Top 25%
CT Cambridge Mobile Telematics: 3 patents #21 of 53Top 40%
HP HP: 2 patents #5,870 of 16,619Top 40%
MA Mitsubishi Electric Visual Solutions America: 1 patents #10 of 23Top 45%
CG Compaq Information Technologies Group: 1 patents #84 of 407Top 25%
VP Virginia Tech Intellectual Properties: 1 patents #405 of 1,095Top 40%
📍 Spring Hill, TN: #2 of 102 inventorsTop 2%
🗺 Tennessee: #215 of 20,272 inventorsTop 2%
Overall (All Time): #75,461 of 4,157,543Top 2%
41
Patents All Time

Issued Patents All Time

Showing 26–41 of 41 patents

Patent #TitleCo-InventorsDate
6148396 Apparatus for sampling path history in a processor pipeline George Z. Chrysos, Jeffrey Adgate Dean, Robert Alan Eustace, Carl A. Waldspurger, William E. Weihl 2000-11-14
6119075 Method for estimating statistics of properties of interactions processed by a processor pipeline Jeffrey Adgate Dean, Stephen C. Root, Carl A. Waldspurger, William E. Weihl 2000-09-12
6092180 Method for measuring latencies by randomly selected sampling of the instructions while the instruction are executed Jennifer-Ann M. Anderson, Jeffrey Adgate Dean, Carl A. Waldspurger, William E. Weihl 2000-07-18
6070009 Method for estimating execution rates of program execution paths Jeffrey Adgate Dean, Robert Alan Eustace, Carl A. Waldspurger, William E. Weihl 2000-05-30
6000044 Apparatus for randomly sampling instructions in a processor pipeline George Z. Chrysos, Jeffrey Adgate Dean, Daniel Leibholz, Edward J. McLellan, Carl A. Waldspurger +1 more 1999-12-07
5964867 Method for inserting memory prefetch operations based on measured latencies in a program optimizer Jennifer-Ann M. Anderson, Jeffrey Adgate Dean, Carl A. Waldspurger, William E. Weihl 1999-10-12
5923872 Apparatus for sampling instruction operand or result values in a processor pipeline George Z. Chrysos, Jeffrey Adgate Dean, Carl A. Waldspurger, William E. Weihl 1999-07-13
5809450 Method for estimating statistics of properties of instructions processed by a processor pipeline George Z. Chrysos, Jeffrey Adgate Dean, Carl A. Waldspurger, William E. Weihl 1998-09-15
4562508 Regulator fault protection circuit John Chen, Chin-Chuan Huang, Nancy D. Graves 1985-12-31
4516168 Shutdown circuit for a switching regulator in a remote controlled television receiver 1985-05-07
4459517 Horizontal output transistor protection circuit 1984-07-10
4435731 Television receiver disabling circuit Ravadee Kliebphipat, Ronald E. Fernsler 1984-03-06
4419608 Horizontal deflection circuit 1983-12-06
4343028 Television receiver high voltage generator protection circuit 1982-08-03
4321514 Commutated SCR regulator for a horizontal deflection circuit Leslie Thibodeau, David W. Luz 1982-03-23
4190791 Switching regulator for television deflection circuit with improved ultor voltage regulation 1980-02-26