Issued Patents All Time
Showing 25 most recent of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7333485 | Network communication device including bonded ports for increased bandwidth | Michael Lee Witkowski, William J. Walker, Kirk D. Roller, Patricia E. Hareski, Gary B. Kotzur | 2008-02-19 |
| 6665733 | Network communication device including bonded ports for increased bandwidth | Michael Lee Witkowski, William J. Walker, Kirk D. Roller, Patricia E. Hareski, Gary B. Kotzur | 2003-12-16 |
| 6430626 | Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses | Michael Lee Witkowski, Gregory T. Chandler, Mohammad Khan, Gary B. Kotzur, William J. Walker | 2002-08-06 |
| 6389480 | Programmable arbitration system for determining priority of the ports of a network switch | Gary B. Kotzur, Patricia E. Hareski, Michael Lee Witkowski, William J. Walker | 2002-05-14 |
| 6260073 | Network switch including a switch manager for periodically polling the network ports to determine their status and controlling the flow of data between ports | William J. Walker, Gary B. Kotzur, Patricia E. Hareski, Michael Lee Witkowski | 2001-07-10 |
| 6249830 | Method and apparatus for distributing interrupts in a scalable symmetric multiprocessor system without changing the bus width or bus protocol | Sompong Paul Olarig, William F. Whiteman, David F. Heinrich | 2001-06-19 |
| 6233246 | Network switch with statistics read accesses | Patricia E. Hareski, William J. Walker, Gary B. Kotzur, Michael Lee Witkowski | 2001-05-15 |
| 6233242 | Network switch with shared memory system | Roger Richter, Michael Lee Witkowski, Gary B. Kotzur, Patricia E. Hareski, William J. Walker | 2001-05-15 |
| 6222840 | Method and system for performing concurrent read and write cycles in network switch | William J. Walker, Gary B. Kotzur, Patricia E. Hareski, Michael Lee Witkowski | 2001-04-24 |
| 6201789 | Network switch with dynamic backpressure per port | Michael Lee Witkowski, Gary B. Kotzur, William J. Walker, Patricia E. Hareski | 2001-03-13 |
| 6098110 | Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses | Michael Lee Witkowski, Gregory T. Chandler, Mohammad Khan, Gary B. Kotzur, William J. Walker | 2000-08-01 |
| 6098109 | Programmable arbitration system for determining priority of the ports of a network switch | Gary B. Kotzur, Patricia E. Hareski, Michael Lee Witkowski, William J. Walker | 2000-08-01 |
| 6094434 | Network switch with separate cut-through buffer | Gary B. Kotzur, Michael Lee Witkowski, William J. Walker, Patricia E. Hareski | 2000-07-25 |
| 6041377 | Method and apparatus for distributing interrupts in a scalable symmetric multiprocessor system without changing the bus width or bus protocol | Sompong Paul Olarig, William F. Whiteman, David F. Heinrich | 2000-03-21 |
| 5944809 | Method and apparatus for distributing interrupts in a symmetric multiprocessor system | Sompong Paul Olarig, William F. Whiteman | 1999-08-31 |
| 5892926 | Direct media independent interface connection system for network devices | Michael Lee Witkowski, William J. Walker, Mohammad Khan, Gary B. Kotzur | 1999-04-06 |
| 5862338 | Polling system that determines the status of network ports and that stores values indicative thereof | William J. Walker, Gary B. Kotzur, Michael Lee Witkowski, Patricia E. Hareski | 1999-01-19 |
| 5555250 | Data error detection and correction system | William J. Walker, Alan L. Goodrum | 1996-09-10 |
| 5517624 | Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems | John A. Landry, Paul R. Culley | 1996-05-14 |
| 5437042 | Arrangement of DMA, interrupt and timer functions to implement symmetrical processing in a multiprocessor computer system | Paul R. Culley, John A. Landry, Christopher C. Wanner, Guy E. McSwain | 1995-07-25 |
| 5396633 | Positive pulse format noise-filter and negative pulse format extension circuit for conditioning interrupt request signals | John A. Landry | 1995-03-07 |
| 5367689 | Apparatus for strictly ordered input/output operations for interrupt system integrity | John A. Landry, Paul R. Culley | 1994-11-22 |
| 5341494 | Memory accessing system with an interface and memory selection unit utilizing write protect and strobe signals | John S. Thayer, Javier F. Izquierdo, Paul R. Culley, John A. Landry | 1994-08-23 |
| 5303364 | Paged memory controller | Paul R. Culley, Mark Taylor | 1994-04-12 |
| 4984213 | Memory block address determination circuit | David G. Abdoo | 1991-01-08 |