Gregory T. Chandler has been granted 11 US patents while listed as an inventor at Compaq Computer . The first was granted in 1991 and the most recent in March 2015. Gregory T. Chandler ranks #435,149 of 4,157,543 US inventors in our database (top 10.5%). Patent records list Gregory T. Chandler in Gainesville, FL, US.
Patents per Year Patents granted per year, 1991 to 2015 Bar chart with a peak of 2 patents in 1995. peak 2 1991: 1 patents 1991 1995: 2 patents 1995 1998: 2 patents 1998 2000: 1 patents 2000 2002: 1 patents 2002 2008: 1 patents 2008 2010: 1 patents 2010 2011: 1 patents 2011 2015: 1 patents 2015 Issued Patents All Time
Showing 1–11 of 11 patents
Patent # Title Co-Inventors Date Approx Value ⓘ
8981751 Control system optimization via adaptive frequency adjustment Chris M. Young , Douglas E. Heineman 2015-03-17
$4,428,000
8072204 Control system optimization via digital diode emulation Douglas E. Heineman , Chris M. Young 2011-12-06
7825642 Control system optimization via independent parameter adjustment Chris M. Young , Douglas E. Heineman 2010-11-02
7386028 Reduced EMI device and method thereof Kenneth Egan , Jitendra K. Budwal , James J. Remedi , Ted J. Beck , Stephen James Sheafor 2008-06-10
6430626 Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses Michael Lee Witkowski , Mohammad Khan , Gary B. Kotzur , Dale J. Mayer , William J. Walker 2002-08-06
6098110 Network switch with a multiple bus structure and a bridge interface for transferring network data between different buses Michael Lee Witkowski , Mohammad Khan , Gary B. Kotzur , Dale J. Mayer , William J. Walker 2000-08-01
$44,998,000
5771359 Bridge having a data buffer for each bus master William C. Galloway , Ryan A. Callison 1998-06-23
$115,833,000
5721839 Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asynchronous buses Ryan A. Callison 1998-02-24
$128,359,000
5469548 Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement Ryan A. Callison , Thomas W. Grieff 1995-11-21
$23,677,000
5448709 Disk array controller having command descriptor blocks utilized by bus master and bus slave for respectively performing data transfer operations Thomas W. Grieff , Ryan A. Callison 1995-09-05
$42,391,000
5077268 Procesing of superconducting ceramics using microwave energy David E. Clark , Iftikhar Ahmad 1991-12-31