Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9181167 | Chemically-modified graphene and method for producing the same | Mu-Yi Hua, Shi-Liang Chen, Hsiao-Chien Chen, Rung-Ywan Tsai, Ming-Jer Jeng | 2015-11-10 |
| 7797140 | Generalizations of adjoint networks techniques for RLC interconnects model-order reductions | Herng-Jer Lee, Chia-Chi Chu, Ming-Hong Lai | 2010-09-14 |
| 7738947 | Biomedical signal instrumentation amplifier | Hwang-Cherng Chow, Jia-Yu Wang | 2010-06-15 |
| 7600206 | Method of estimating the signal delay in a VLSI circuit | Ming-Hong Lai, Chao-Hsuan Hsu, Chia-Chi Chu | 2009-10-06 |
| 7562324 | Method of designing a synchronous circuit of VLSI for clock skew scheduling and optimization | Chao-Kai Chang, Chia-Chi Chu | 2009-07-14 |
| 7512525 | Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders | Herng-Jer Lee, Chia-Chi Chu, Chao-Kai Chang | 2009-03-31 |
| 7509243 | Method of determining high-speed VLSI reduced-order interconnect by non-symmetric lanczos algorithm | Chia-Chi Chu, Ming-Hong Lai | 2009-03-24 |
| 7437689 | Interconnect model-order reduction method | Chia-Chi Chu, Herng-Jer Lee, Chao-Kai Chang | 2008-10-14 |
| 7398499 | Method of searching paths suffering from the electrostatic discharge in the process of an integrated circuit design | Ming-Hong Lai, Chao-Yi Cho, Chia-Chi Chu | 2008-07-08 |
| 7373367 | Efficient digital filter design tool for approximating an FIR filter with a low-order linear-phase IIR filter | Herng-Jer Lee, Chia-Chi Chu | 2008-05-13 |
| 7254790 | Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops | Herng-Jer Lee, Chia-Chi Chu, Ming-Hong Lai | 2007-08-07 |
| 7216322 | Clock tree synthesis for low power consumption and low clock skew | Ming-Hong Lai, Chao-Kai Chang, Chia-Chi Chu | 2007-05-08 |
| 7216309 | Method and apparatus for model-order reduction and sensitivity analysis | Herng-Jer Lee, Chia-Chi Chu | 2007-05-08 |
| 7191418 | Method and apparatus for rapidly selecting types of buffers which are inserted into the clock tree for high-speed very-large-scale-integration | Herng-Jer Lee, Chia-Chi Chu | 2007-03-13 |
| 7181664 | Method on scan chain reordering for lowering VLSI power consumption | Herng-Jer Lee, Chia-Ming Ho, Chia-Chi Chu | 2007-02-20 |
| 7124381 | Method of estimating crosstalk noise in lumped RLC coupled interconnects | Herng-Jer Lee, Chia-Chi Chu, Ming-Hong Lai | 2006-10-17 |
| 7017130 | Method of verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits | Herng-Jer Lee, Chia-Chi Chu, Ming-Hong Lai | 2006-03-21 |
| D361159 | Lipstick case | — | 1995-08-08 |