Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7797140 | Generalizations of adjoint networks techniques for RLC interconnects model-order reductions | Chia-Chi Chu, Wu-Shiung Feng, Ming-Hong Lai | 2010-09-14 |
| 7512525 | Multi-point model reductions of VLSI interconnects using the rational Arnoldi method with adaptive orders | Chia-Chi Chu, Wu-Shiung Feng, Chao-Kai Chang | 2009-03-31 |
| 7437689 | Interconnect model-order reduction method | Chia-Chi Chu, Wu-Shiung Feng, Chao-Kai Chang | 2008-10-14 |
| 7373367 | Efficient digital filter design tool for approximating an FIR filter with a low-order linear-phase IIR filter | Chia-Chi Chu, Wu-Shiung Feng | 2008-05-13 |
| 7254790 | Method of moment computations in R(L)C interconnects of high speed VLSI with resistor loops | Chia-Chi Chu, Wu-Shiung Feng, Ming-Hong Lai | 2007-08-07 |
| 7216309 | Method and apparatus for model-order reduction and sensitivity analysis | Chia-Chi Chu, Wu-Shiung Feng | 2007-05-08 |
| 7191418 | Method and apparatus for rapidly selecting types of buffers which are inserted into the clock tree for high-speed very-large-scale-integration | Chia-Chi Chu, Wu-Shiung Feng | 2007-03-13 |
| 7181664 | Method on scan chain reordering for lowering VLSI power consumption | Chia-Ming Ho, Chia-Chi Chu, Wu-Shiung Feng | 2007-02-20 |
| 7124381 | Method of estimating crosstalk noise in lumped RLC coupled interconnects | Chia-Chi Chu, Wu-Shiung Feng, Ming-Hong Lai | 2006-10-17 |
| 7017130 | Method of verification of estimating crosstalk noise in coupled RLC interconnects with distributed line in nanometer integrated circuits | Chia-Chi Chu, Wu-Shiung Feng, Ming-Hong Lai | 2006-03-21 |