AM

Anmol Mathur

CS Calypto Design Systems: 8 patents #1 of 33Top 4%
CS Cadence Design Systems: 4 patents #399 of 2,263Top 20%
MG Mentor Graphics: 2 patents #191 of 698Top 30%
Overall (All Time): #346,163 of 4,157,543Top 9%
14
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
10534723 System, method, and computer program product for conditionally eliminating a memory read request Nikhil Tripathi, Venky Ramachandran, Malay Haldar, Sumit Roy, Abhishek Roy +1 more 2020-01-14
9720859 System, method, and computer program product for conditionally eliminating a memory read request Nikhil Tripathi, Venky Ramachandran, Malay Haldar, Sumit Roy, Abhishek Roy +1 more 2017-08-01
8122401 System, method, and computer program product for determining equivalence of netlists utilizing at least one transformation Pankaj P. Chauhan, Deepak Goyal 2012-02-21
8117571 System, method, and computer program product for determining equivalence of netlists utilizing abstractions and transformations Pankaj P. Chauhan, Deepak Goyal 2012-02-14
7966593 Integrated circuit design system, method, and computer program product that takes into account the stability of various design signals Venky Ramachandran, Nikhil Tripathi, Sumit Roy, Malay Haldar 2011-06-21
7761827 Integrated circuit design system, method, and computer program product that takes into account observability based clock gating conditions Venky Ramachandran, Nikhil Tripathi, Sumit Roy, Malay Haldar 2010-07-20
7673257 System, method and computer program product for word-level operator-to-cell mapping Shail Bains, Abhishek Ranjan, Venky Ramachandran 2010-03-02
7350168 System, method and computer program product for equivalence checking between designs with sequential differences Nikhil Sharma, Deepak Goyal, Gagan Hasteer, Rajarshi Mukherjee 2008-03-25
7284218 Method and system for inplace symbolic simulation over multiple cycles of a multi-clock domain design Sumit Roy, Gagan Hasteer 2007-10-16
7222317 Circuit comparison by information loss matching Deepak Goyal 2007-05-22
6832357 Reducing datapath widths by rebalancing data flow topology Sanjeev Saluja 2004-12-14
6807651 Procedure for optimizing mergeability and datapath widths of data flow graphs Sanjeev Saluja 2004-10-19
6772398 Reducing datapath widths responsively to upper bound on information content Sanjeev Saluja 2004-08-03
6772399 Enhancing mergeability of datapaths and reducing datapath widths responsively to required precision Sanjeev Saluja 2004-08-03