SS

Sanjeev Saluja

CS Cadence Design Systems: 4 patents #399 of 2,263Top 20%
📍 Gurugram, IN: #16 of 124 inventorsTop 15%
Overall (All Time): #1,266,301 of 4,157,543Top 35%
4
Patents All Time

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDate
6832357 Reducing datapath widths by rebalancing data flow topology Anmol Mathur 2004-12-14
6807651 Procedure for optimizing mergeability and datapath widths of data flow graphs Anmol Mathur 2004-10-19
6772398 Reducing datapath widths responsively to upper bound on information content Anmol Mathur 2004-08-03
6772399 Enhancing mergeability of datapaths and reducing datapath widths responsively to required precision Anmol Mathur 2004-08-03