XC

Xinghao Chen

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
RJ Rutgers, The State University Of New Jersey: 1 patents #651 of 1,498Top 45%
Overall (All Time): #1,017,666 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8164345 Spectral and information theoretic method of test point, partial-scan, and full-scan flip-flop insertion to improve integrated circuit testability Michael L. Bushnell, Raghuveer Ausoori, Omar B. Khan, Deepak Mehta 2012-04-24
7702980 Scan-load-based dynamic scan configuration 2010-04-20
7535297 Architecture and method for improving efficiency of a class-A power amplifier by dynamically scaling biasing current thereof as well as synchronously compensating gain thereof in order to maintain overall constant gain of the class-A power amplifier at all biasing configurations thereof Yanbo Tian, Norman Scheinberg 2009-05-19
6922800 Test sequences generated by automatic test pattern generation and applicable to circuits with embedded multi-port RAMs Joseph C. Watkins 2005-07-26
6618826 Test sequences generated by automatic test pattern generation and applicable to circuits with embedded multi-port RAMs Joseph C. Watkins 2003-09-09