JW

Joseph C. Watkins

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Endicott, NY: #278 of 620 inventorsTop 45%
🗺 New York: #48,759 of 115,490 inventorsTop 45%
Overall (All Time): #2,182,211 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
6922800 Test sequences generated by automatic test pattern generation and applicable to circuits with embedded multi-port RAMs Xinghao Chen 2005-07-26
6618826 Test sequences generated by automatic test pattern generation and applicable to circuits with embedded multi-port RAMs Xinghao Chen 2003-09-09