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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
PE

Patrick John Eichenseer — 6 Patents

CSCadence Design Systems: 5 patents #362 of 2,265Top 20%
SPSilicon Perspective: 1 patents #4 of 11Top 40%
Austin, TX: #4,934 of 18,064 inventorsTop 30%
Texas: #24,637 of 125,132 inventorsTop 20%
Overall (All Time): #779,687 of 4,157,543Top 20%
6 Patents All Time
Patrick John Eichenseer has been granted 6 US patents while listed as an inventor at Cadence Design Systems. The first was granted in 2003 and the most recent in November 2011. Patrick John Eichenseer ranks #779,687 of 4,157,543 US inventors in our database (top 18.8%). Patent records list Patrick John Eichenseer in Austin, TX, US.

Patents per Year

Patents granted per year, 2003 to 2011Bar chart with a peak of 1 patents in 2003.peak 12003: 1 patents20032006: 1 patents20062007: 1 patents20072009: 1 patents20092010: 1 patents20102011: 1 patents2011

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
8051397 Method and system for conducting design explorations of an integrated circuit Thaddeus Clay McCracken, Jong-Chang Lee, Ping-Chih Wu, Cecile Nghiem, Kit Lam Cheong 2011-11-01 $8,567,000
7793254 Method and system for designing a timing closure of an integrated circuit Ricky Lewelling, Ziad Sadi 2010-09-07 $4,692,000
7603643 Method and system for conducting design explorations of an integrated circuit Thaddeus Clay McCracken, Jong-Chang Lee, Ping-Chih Wu, Cecile Nghiem, Kit Lam Cheong 2009-10-13 $17,305,000
7257798 Method and system for designing a timing closure of an integrated circuit Ricky Lewelling, Ziad Sadi 2007-08-14 $12,578,000
7155694 Trial placement system with cloning Hsi-Chuan Chen, Dennis Huang 2006-12-26 $6,074,000
6578183 Method for generating a partitioned IC layout Kit Lam Cheong, Wei-Jin Dai, Hsi-Chuan Chen 2003-06-10