TM

Thaddeus Clay McCracken

CS Cadence Design Systems: 15 patents #61 of 2,263Top 3%
📍 Tigard, OR: #54 of 696 inventorsTop 8%
🗺 Oregon: #2,880 of 28,073 inventorsTop 15%
Overall (All Time): #323,590 of 4,157,543Top 8%
15
Patents All Time

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #TitleCo-InventorsDate
9141743 Methods, systems, and articles of manufacture for providing evolving information in generating a physical design with custom connectivity using force models and design space decomposition Joseph P. Jarosz 2015-09-22
9135373 Method and system for implementing an interface for I/O rings Joseph P. Jarosz, Miles P. McGowan 2015-09-15
9098667 Methods, systems, and articles of manufacture for implementing physical designs with force directed placement or floorplanning and layout decomposition Joseph P. Jarosz 2015-08-04
9043742 Methods, systems, and articles of manufacture for implementing physical design using force models with custom connectivity 2015-05-26
8918751 Methods, systems, and articles of manufacture for implementing physical design decomposition with custom connectivity 2014-12-23
8683412 Method and system for optimizing placement of I/O element nodes of an I/O ring for an electronic design Miles P. McGowan 2014-03-25
8677307 Method and system for implementing die size adjustment and visualization Joseph P. Jarosz 2014-03-18
8549457 Method and system for implementing core placement Timothy Moore 2013-10-01
8516433 Method and system for mapping memory when selecting an electronic product Miles P. McGowan 2013-08-20
8443323 Method and system for implementing a structure to implement I/O rings and die area estimations Miles P. McGowan 2013-05-14
8386981 Method and systems for implementing I/O rings and die area estimations Miles P. McGowan 2013-02-26
8375344 Method and system for determining configurations Miles P. McGowan, Joseph P. Jarosz, Jeffrey K. Ng 2013-02-12
8261215 Method and system for performing cell modeling and selection 2012-09-04
8051397 Method and system for conducting design explorations of an integrated circuit Jong-Chang Lee, Ping-Chih Wu, Cecile Nghiem, Kit Lam Cheong, Patrick John Eichenseer 2011-11-01
7603643 Method and system for conducting design explorations of an integrated circuit Jong-Chang Lee, Ping-Chih Wu, Cecile Nghiem, Kit Lam Cheong, Patrick John Eichenseer 2009-10-13