JT

Jeff Taraldson

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
📍 San Ramon, CA: #982 of 2,140 inventorsTop 50%
🗺 California: #149,087 of 386,348 inventorsTop 40%
Overall (All Time): #1,519,966 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
10515180 Method, system, and computer program product to implement snapping for an electronic design Karun Sharma, Henry Yu, John Hainsworth, Kuoching Lin, Hui Xu 2019-12-24
10402530 Method, system, and computer program product for implementing placement using row templates for an electronic design Karun Sharma, Yu-Mei Liu, Subhashis Mandal, Kanaka Raju Gorle 2019-09-03
9053289 Method and system for implementing an improved interface for designing electronic layouts Gilles S. C. Lamant, Henry Yu, Simon Simonian, Johannes Grad 2015-06-09