KL

Kuoching Lin

CS Cadence Design Systems: 3 patents #541 of 2,263Top 25%
MG Mentor Graphics: 1 patents #345 of 698Top 50%
📍 Cupertino, CA: #1,748 of 6,989 inventorsTop 30%
🗺 California: #66,801 of 386,348 inventorsTop 20%
Overall (All Time): #582,072 of 4,157,543Top 15%
9
Patents All Time

Issued Patents All Time

Showing 1–9 of 9 patents

Patent #TitleCo-InventorsDate
10515180 Method, system, and computer program product to implement snapping for an electronic design Karun Sharma, Henry Yu, John Hainsworth, Jeff Taraldson, Hui Xu 2019-12-24
10503858 Method, system, and computer program product for implementing group legal placement on rows and grids for an electronic design Henry Yu, Hui Xu 2019-12-10
10474782 Layout placement mapping from schematic placement of circuit cells 2019-11-12
7747973 Clustering circuit paths in electronic circuit design Lungtien Liu 2010-06-29
7607117 Representing device layout using tree structure 2009-10-20
7392494 Clustering circuit paths in electronic circuit design Lungtien Liu 2008-06-24
7096444 Representing device layout using tree structure 2006-08-22
6349402 Method and apparatus for optimizing differential pairs based on timing constraints 2002-02-19
6077309 Method and apparatus for locating coordinated starting points for routing a differential pair of traces 2000-06-20